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AM2434BSDFHIALVR Datasheet(PDF) 71 Page - Texas Instruments |
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AM2434BSDFHIALVR Datasheet(HTML) 71 Page - Texas Instruments |
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71 / 242 page ![]() Table 6-40. GPIO1 Signal Descriptions (continued) Signal Name [1] Signal Type [2] Description [3] ALV PIN [4] ALX PIN [4] GPIO1_78 IO General Purpose Input/Output C20 C16 GPIO1_79 IO General Purpose Input/Output E19 B19 (1) This GPIO1 signal is not supported by the AM243x_ALX device package. See AM243x_ALX Package - Unsupported Interfaces and Signals for additional details. MCU Domain Instances Table 6-41. MCU_GPIO0 Signal Descriptions Signal Name [1] Signal Type [2] Description [3] ALV PIN [4] ALX PIN [4] MCU_GPIO0_0 IO General Purpose Input/Output E8 C2 MCU_GPIO0_1 IO General Purpose Input/Output D8 D4 MCU_GPIO0_2 IO General Purpose Input/Output A8 B2 MCU_GPIO0_3 IO General Purpose Input/Output A9 D6 MCU_GPIO0_4 (1) IO General Purpose Input/Output B6 MCU_GPIO0_5 (1) IO General Purpose Input/Output A7 MCU_GPIO0_6 (1) IO General Purpose Input/Output B7 MCU_GPIO0_7 (1) IO General Purpose Input/Output D7 MCU_GPIO0_8 (1) IO General Purpose Input/Output C7 MCU_GPIO0_9 (1) IO General Purpose Input/Output C8 MCU_GPIO0_10 (1) IO General Purpose Input/Output E7 MCU_GPIO0_11 (1) IO General Purpose Input/Output E6 MCU_GPIO0_12 (1) IO General Purpose Input/Output C6 MCU_GPIO0_13 (1) IO General Purpose Input/Output D6 MCU_GPIO0_14 (1) IO General Purpose Input/Output C9 MCU_GPIO0_15 (1) IO General Purpose Input/Output D9 MCU_GPIO0_16 (1) IO General Purpose Input/Output B8 MCU_GPIO0_17 (1) IO General Purpose Input/Output B9 MCU_GPIO0_18 (1) IO General Purpose Input/Output E9 MCU_GPIO0_19 (1) IO General Purpose Input/Output A10 MCU_GPIO0_20 (1) IO General Purpose Input/Output A11 MCU_GPIO0_21 (1) IO General Purpose Input/Output B10 MCU_GPIO0_22 IO General Purpose Input/Output B13 A6 (1) This MCU_GPIO0 signal is not supported by the AM243x_ALX device package. See AM243x_ALX Package - Unsupported Interfaces and Signals for additional details. 6.3.12 GPMC MAIN Domain Instances Table 6-42. GPMC0 Signal Descriptions Signal Name [1] ((2)) Signal Type [2] Description [3] ALV PIN [4] ALX PIN [4] GPMC0_ADVn_ALE O GPMC Address Valid (active low) or Address Latch Enable P16 GPMC0_CLK (1) O GPMC clock R17 GPMC0_DIR O GPMC Data Bus Signal Direction Control N17 GPMC0_OEn_REn O GPMC Output Enable (active low) or Read Enable (active low) R18 GPMC0_WEn O GPMC Write Enable (active low) T21 GPMC0_WPn O GPMC Flash Write Protect (active low) N16 GPMC0_A0 OZ GPMC Address 0 Output. Only used to effectively address 8-bit data non-multiplexed memories U2, U7 G1, T2 GPMC0_A1 OZ GPMC address 1 Output in A/D non-multiplexed mode and Address 17 in A/D multiplexed mode AA2, V7 K2, Y4 www.ti.com AM2434, AM2432, AM2431 SPRSP65C – APRIL 2021 – REVISED MARCH 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 71 Product Folder Links: AM2434 AM2432 AM2431 |
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