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AM2434BSDFHIALVR Datasheet(PDF) 97 Page - Texas Instruments |
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AM2434BSDFHIALVR Datasheet(HTML) 97 Page - Texas Instruments |
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97 / 242 page  Table 6-85. Connectivity Requirements (ALV Package) (continued) BALL NUMBER BALL NAME CONNECTION REQUIREMENTS F18 G18 J21 G19 K20 J20 J18 J17 H17 H19 H18 G17 MMC0_CALPAD MMC0_CLK MMC0_CMD MMC0_DS MMC0_DAT0 MMC0_DAT1 MMC0_DAT2 MMC0_DAT3 MMC0_DAT4 MMC0_DAT5 MMC0_DAT6 MMC0_DAT7 If MMC0 is not used, each of these balls must be left unconnected. H15 K15 VDDA_3P3_SDIO CAP_VDDSHV_MMC1 If SDIO_LDO is not used to power VDDSHV5, each of these balls must be connected directly to VSS. P12 P13 P11 R14 VDDA_0P85_SERDES0 VDDA_0P85_SERDES0 VDDA_0P85_SERDES0_C VDDA_1P8_SERDES0 If SERDES0 is not used and the device boundary scan function is required, each of these balls must be connected to valid power sources. If SERDES0 is not used and the device boundary scan function is not required, each of these balls may alternatively be connected directly to VSS. T13 W16 W17 Y15 Y16 AA16 AA17 SERDES0_REXT SERDES0_REFCLK0N SERDES0_REFCLK0P SERDES0_RX0_N SERDES0_RX0_P SERDES0_TX0_N SERDES0_TX0_P If SERDES0 is not used, leave unconnected. Note: The SERDES0_REXT pin can only be left unconnected when VDDA_0P85_SERDES0, VDDA_0P85_SERDES0_C, and VDDA_1P8_SERDES0 are connected to VSS. The SERDES0_REXT pin must be connected to VSS through the appropriate external resistor when VDDA_0P85_SERDES0, VDDA_0P85_SERDES0_C, and VDDA_1P8_SERDES0 are connected to power sources. T12 R15 R13 VDDA_0P85_USB0 VDDA_1P8_USB0 VDDA_3P3_USB0 If USB0 is not used, each of these balls must be connected directly to VSS. AA20 AA19 U16 U17 T14 USB0_DM USB0_DP USB0_ID USB0_RCALIB USB0_VBUS If USB0 is not used, leave unconnected. Note: The USB0_RCALIB pin can only be left unconnected when VDDA_0P85_USB0, VDDA_1P8_USB0, and VDDA_3P3_USB0 are connected to VSS. The USB0_RCALIB pin must be connected to VSS through the appropriate external resistor when VDDA_0P85_USB0, VDDA_1P8_USB0, and VDDA_3P3_USB0 are connected to power sources. K10 VMON_VSYS If VMON_VSYS is not used, this ball must be connected directly to VSS. K16 E12 F13 F14 VMON_1P8_MCU VMON_1P8_SOC VMON_3P3_MCU VMON_3P3_SOC If VMON_1P8_MCU, VMON_1P8_SOC, VMON_3P3_MCU, and VMON_3P3_SOC are not used to monitor the MCU and SOC power rails, these balls must still be connected to their respective 1.8V and 3.3V power rails. (1) To determine which power supply is associated with any IO, see POWER column of the Pin Attributes table. Table 6-86. Connectivity Requirements (ALX Package) BALL NUMBER BALL NAME CONNECTION REQUIREMENTS B20 B6 MCU_SAFETY_ERRORn TRSTn Each of these balls must be connected to VSS through separate external pull resistors to ensure they are held to a valid logic low level if a PCB signal trace is connected and not actively driven by an attached device. The internal pull-down may be used to hold a valid logic low level if no PCB signal trace is connected to the ball. www.ti.com AM2434, AM2432, AM2431 SPRSP65C – APRIL 2021 – REVISED MARCH 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 97 Product Folder Links: AM2434 AM2432 AM2431 |
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