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AM2434BSDFHIALVR Datasheet(PDF) 2 Page - Texas Instruments |
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AM2434BSDFHIALVR Datasheet(HTML) 2 Page - Texas Instruments |
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2 / 242 page ![]() – Support for takeover protection, IP protection, and anti-roll back protection • Support for cryptographic acceleration – Session-aware cryptographic engine with ability to auto-switch key-material based on incoming data stream – Supports cryptographic cores • AES – 128/192/256 Bits key sizes • 3DES – 56/112/168 Bits key sizes • MD5, SHA1 • SHA2 – 224/256/384/512 • DRBG with true random number generator • PKA (Public Key Accelerator) to Assist in RSA/ECC processing – DMA support • Debugging security – Secure software controlled debug access – Security aware debugging • Secure storage support • On-the-Fly encryption (OTFE) support for OSPI interface in XIP mode • Networking security support for data (Payload) encryption/authentication via packet based hardware cryptographic engine • DMSC-L co-processor for key and security management, with dedicated device level interconnect High-speed interfaces: • 1× Integrated Ethernet switch supporting up to 2 external ports (CPSW3G) – Up to 2 Ethernet ports • RGMII (10/100/1000) • RMII (10/100) – IEEE 1588 (2008 Annex D, Annex E, Annex F) with 802.1AS PTP – Clause 45 MDIO PHY management – Energy efficient Ethernet (802.3az) • 1× PCI-Express® Gen2 controller (PCIE) – Supports Gen2 operation – Supports Single Lane operation • 1× USB 3.1-Gen1 Dual-role Device (DRD) Subsystem (USBSS) – One shared USBSS port for enhanced SuperSpeed Gen1 or USB 2.0 – Port configurable as USB host, USB peripheral, or USB Dual-role Device – Integrated USB VBUS detection • 1× Serializer/Deserializer (SERDES) – One SERDES lane to support either PCI- Express® Gen2 or USB SuperSpeed Gen1 General connectivity peripherals: • 6× Inter-Integrated Circuit (I2C) ports • 9× configurable Universal Asynchronous Receive/ Transmit (UART) modules • 1× 12-bit Analog-to-Digital Converters (ADC) – Up to 4 MSPS – 8× multiplexed analog inputs • 7× Multichannel Serial Peripheral Interfaces (MCSPI) controllers • 3× General-Purpose I/O (GPIO) modules Industrial and control interfaces: • 9× Enhanced Pulse-Width Modulator (EPWM) modules • 3× Enhanced Capture (ECAP) modules • 3× Enhanced Quadrature Encoder Pulse (EQEP) modules • 2× Modular Controller Area Network (MCAN) modules with full CAN-FD support • 2× Fast Serial Interface Transmitter (FSI_TX) cores • 6× Fast Serial Interface Receiver (FSI_RX) cores Media and data storage: • 2× MultiMedia Card/Secure Digital (MMC/SD) interfaces – One 4-bit for SD/SDIO – One 8-bit for eMMC – Integrated analog switch for voltage switching between 3.3V to 1.8V for high-speed cards • 1× General-Purpose Memory Controller (GPMC) – 16-bit parallel bus with 133 MHz clock or – 32-bit parallel bus with 100 MHz clock – Error Location Module (ELM) support • 1× Flash Subsystem (FSS) that can be configured as one Octal SPI (OSPI) flash interfaces or one Quad SPI (QSPI) Power management: • Simplified power sequence • Dual-voltage I/O Support • Integrated SDIO LDO for handling automatic voltage transition for SD interface • Integrated voltage supervisor for safety monitoring of over-under voltage conditions • Integrated power supply glitch detector for detecting fast supply transients Functional Safety: • Functional Safety-Compliant Targeted – Developed for functional safety applications – Documentation will be available to aid IEC 61508 functional safety system design – Systematic capability up to SIL 3 – Hardware integrity up to SIL 2 targeted for MCU domain – Quality-managed MAIN Domain AM2434, AM2432, AM2431 SPRSP65C – APRIL 2021 – REVISED MARCH 2022 www.ti.com 2 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: AM2434 AM2432 AM2431 |
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