WM8940CGEFLSLASHV datasheet(61/88 Pages) CIRRUS

61 / 88 page

WM8940

Rev 4.4

CONTROL INTERFACE

SELECTION OF CONTROL MODE AND 2-WIRE MODE ADDRESS

The control interface can operate as either a 3-wire or 2-wire interface. The MODE pin determines the

2 or 3 wire mode as shown in Table 53.

The WM8940 is controlled by writing to registers through a serial control interface. A control word

consists of 24 bits. The first 7 bits (B23 to B16) are address bits that select which control register is

accessed. The remaining 16 bits (B15 to B0) are register bits, corresponding to the 16 bits in each

control register.

MODE

INTERFACE FORMAT

Low

2 wire

Hi-Z

3 wire

High

3 wire

Table 53 Control Interface Mode Selection

USE OF MODE AS A GPIO PIN IN 3-WIRE MODE

In 3-wire mode, MODE can be used as a GPIO pin. If MODE is being used as a GPIO output, the

partner device doesn’t have to drive MDE - the pin will be pulled-up internally causing 3-wire mode will

be selected. The GPIO function is enabled by setting the MODE_GPIO register bit. The MODE pin

can then be controlled using the GPIO register bits as described in Table 52.

To use MODE as a GPIO input, MODE must be undriven or driven high at start-up. Specifically

MODE must be high or hi-Z during an initial write to the control interface which sets the MODE_GPIO

MODE pin can be used freely as a GPIO input or output.

MODE PAD

WM8940

CLOCK_IN

Partner

Device

DIGITAL CORE

DFF

ENB

Vdd

GPIO_OE

GPIO_OUT

MODE

Pull up holds

interface in 3

wire mode if

MODE is an

input.

used to enable

MODE as an

output. Standard

GPIO logic used

to select clock

out.

Pull up is

disabled when

MODE

becomes

output

OR gate ensures

that clock being

output does not

affect the internal

version of MODE

Figure 33 Example Usage of MODE Pin to Generate a Clock out in 3-wire Mode

This example shows how the MODE_GPIO register bit interfaces to the MODE pad in the case there

MODE is used as a GPIO output. When MODE_GPIO is set, the internal version of MODE is

overridden to high and the MODE pin output driver is enabled. The pull up, which is used to default 3-

wire mode at start-up, is disabled as a power saving measure. MODE_GPIO cannot be set in 2-wire

–de – this would prevent correct operation of the control interface. Internal timing is arranged to

ensure that the override is in place before the pull-up is disabled.

WM8940CGEFL/V Datasheet(PDF) 61 Page - Cirrus Logic

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