HT49CV7 datasheet(7/48 Pages) HOLTEK

7 / 48 page

HT49RV7/HT49CV7

Rev. 1.00

April 20, 2006

Functional Description

Execution Flow

The system clock is derived from either a crystal or an

RC oscillator or a 32768Hz crystal oscillator. It is inter-

nally divided into four non-overlapping clocks. One in-

struction cycle consists of four system clock cycles.

Instruction fetching and execution are pipelined in such

a way that a fetch takes one instruction cycle while de-

coding and execution takes the next instruction cycle.

The pipelining scheme ensures that instructions are ef-

fectively executed in one cycle. Exceptions to this are in-

structions that change the contents of the program

counter, such as subroutine calls or jumps, in which

case, two cycles are required to complete the instruc-

tion.

Program Counter

- PC

The 13-bit program counter (PC) controls the sequence

in which the instructions stored in the program ROM are

executed and its contents specify a maximum of 8192

addresses.

After accessing a program memory word to fetch an in-

struction code, the contents of the program counter are

incremented by one. The program counter then points to

the memory word containing the next instruction code.

When executing a jump instruction, conditional skip ex-

ecution, loading PCL register, subroutine call, initial re-

set, internal interrupt, external interrupt or return from

subroutine, etc., the microcontroller manages program

control by loading the address corresponding to each in-

struction.

For conditional skip instructions, once the condition has

been met, the next instruction, which has already been

fetched during the current instruction execution, is dis-

carded and a dummy cycle replaces it while the proper

instruction is obtained. Otherwise proceed with the next

instruction.

T 1

T 2

T 3

T 4

T 1

T 2

T 3

T 4

T 1

T 2

T 3

T 4

F e t c h I N S T ( P C )

E x e c u t e I N S T ( P C - 1 )

F e t c h I N S T ( P C + 1 )

E x e c u t e I N S T ( P C )

F e t c h I N S T ( P C + 2 )

E x e c u t e I N S T ( P C + 1 )

P C

P C + 1

P C + 2

S y s t e m C l o c k

O S C 2 ( R C o n l y )

P C

Execution Flow

Mode

Program Counter

*12

*11

*10

Initial Reset

0000000000000

External Interrupt 0

0000000000100

External Interrupt 1

0000000001000

Timer/Event Counter 0 Overflow

0000000001100

Timer/Event Counter 1 Overflow

0000000010000

Serial Interface Interrupt

0000000010100

Multi-function Interrupt

0000000011000

Skip

Program Counter+2

Loading PCL

*12

*11

*10

Jump, Call Branch

#12

#11

#10

Return from Subroutine

S12

S11

S10

Program Counter

Note:

*12~*0: Program counter bits

S12~S0: Stack register bits

#12~#0: Instruction code bits

@7~@0: PCL bits

HT49CV7 Datasheet(PDF) 7 Page - Holtek Semiconductor Inc

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