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HT49CV7 Datasheet(PDF) 17 Page - Holtek Semiconductor Inc |
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HT49CV7 Datasheet(HTML) 17 Page - Holtek Semiconductor Inc |
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17 / 48 page  HT49RV7/HT49CV7 Rev. 1.00 17 April 20, 2006 The register states are summarized below: Register Reset (Power-on) WDT Time-out (Normal Operation) RES Reset (Normal Operation) RES Reset (HALT) WDT Time-out (HALT)* TMR0H xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx uuuu uuuu TMR0L xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx uuuu uuuu TMR0C 00-0 1000 00-0 1000 00-0 1000 00-0 1000 uu-u uuuu TMR1H xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx uuuu uuuu TMR1L xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx uuuu uuuu TMR1C 0000 1--- 0000 1--- 0000 1--- 0000 1--- uuuu u--- Program Counter 0000H 0000H 0000H 0000H 0000H MP0 xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu MP1 xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu BP 0000 0000 0000 0000 0000 0000 0000 0000 uuuu uuuu ACC xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu TBLP xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu TBLH xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu STATUS --00 xxxx --1u uuuu --uu uuuu --01 uuuu --11 uuuu INTC0 -000 0000 -000 0000 -000 0000 -000 0000 -uuu uuuu INTC1 -000 -000 -000 -000 -000 -000 -000 -000 -uuu -uuu RMTC 0000 000- 0000 000- 0000 000- 0000 000- uuuu uuu- MFIS ---0 0000 ---0 0000 ---0 0000 ---0 0000 ---u uuuu RTCC ---0 -111 ---0 -111 ---0 -111 ---0 -111 ---u -uuu PA 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PAC 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PB 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PBC 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PC 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PCC 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PD 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PDC 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PWM0 xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx uuuu uuuu PWM1 xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx uuuu uuuu PWM2 xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx uuuu uuuu PWM3 xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx uuuu uuuu SBCR 0110 0000 0110 0000 0110 0000 0110 0000 uuuu uuuu SBDR xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx uuuu uuuu RMT0 0000 0000 0000 0000 0000 0000 0000 0000 uuuu uuuu RMT1 0000 0000 0000 0000 0000 0000 0000 0000 uuuu uuuu ADRL xx-- ---- xx-- ---- xx-- ---- xx-- ---- uu-- ---- ADRH xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx uuuu uuuu ADCR 0100 0000 0100 0000 0100 0000 0100 0000 uuuu uuuu ACSR 1--- --00 1--- --00 1--- --00 ---- --00 u--- --uu VFDC 0000 1111 0000 1111 0000 1111 0000 1111 uuuu uuuu Note: ²*² stands for warm reset ²u² stands for unchanged ²x² stands for unknown |
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