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HT49CV7 Datasheet(PDF) 20 Page - Holtek Semiconductor Inc |
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HT49CV7 Datasheet(HTML) 20 Page - Holtek Semiconductor Inc |
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20 / 48 page ![]() HT49RV7/HT49CV7 Rev. 1.00 20 April 20, 2006 applied to PA3 by options. No matter what the operation mode is, writinga0to ET0I or ET1I disables the related interrupt service. When the PFD function is selected, ex- ecuting ²SET [PA].3² instruction will enable the PFD output and executing ²CLR [PA].3² instruction will dis- able the PFD output. In the case of timer/event counter OFF condition, writing data to the timer/event counter preload register also re- loads that data to the timer/event counter. But if the timer/event counter is turned on, data written to the timer/event counter is kept only in the timer/event coun- ter preload register. The timer/event counter still contin- ues its operation until an overflow occurs. When the timer/event counter (reading TMR0/TMR1) is read, the clock is blocked to avoid errors, as this may re- sults in a counting error. Blocking of the clock should be taken into account by the programmer. It is strongly rec- ommended to load a desired value into the TMR0/TMR1 register first, before turning on the related timer/event counter, for proper operation since the initial value of the TMR0/TMR1 is unknown. Due to the timer/event coun- ter scheme, the programmer should pay special atten- tion on the instruction to enable then disable the timer for the first time, whenever there is a need to use the timer/event counter function, to avoid unpredictable re- sult. After this procedure, the timer/event function can be operated normally. Bits 2~0 of the TMR0C can be used to define the pre-scaling stages of the internal clock sources of the timer/event counter. The definitions are as shown. The overflow signal of the timer/event counter can be used to generate the PFD signal. The timer prescaler is also used as the PWM counter. Remote Control Timer - RMT The HT49RV7/HT49CV7 provides an 8-bit remote con- trol timer that has a pulse width measurement function. Pulse width is measured from a difference in count value when the valid edge (RMT pin) has been detected while the timer operates in the running mode. N o i s e R e j e c t i o n R i s i n g E d g e D e t e c t i o n R e m o t e C o n t r o l T i m e r C a p t u r e R e g i s t e r R M T 0 ( 2 2 H ) 8 - b i t T i m e r C o u n t e r R e m o t e C o n t r o l T i m e r C a p t u r e R e g i s t e r R M T 1 ( 2 3 H ) N o i s e R e j e c t i o n F a l l i n g E d g e D e t e c t i o n P r e - s c a l e r f X / 2 5 ~ f X / 2 8 4 - 1 M U X R M S 1 R M S 0 R M E M U X f X R M C S f S Y S f S Y S / 4 R M T L a t c h L a t c h I n t e r r u p t ( R M T 0 F ) I n t e r r u p t ( R M T 1 F ) C l e a r O v e r f l o w ( R M T V F ) Remote Control Timer Bit No. Label Function 0 ¾ Unused bit, read as ²0² 1 ERMT0 Controls the remote control timer rising edge interrupt (1=enable; 0=disable) 2 ERMT1 Controls the remote control timer falling edge interrupt (1=enable; 0=disable) 3 ERMTV Controls the remote control timer overflow interrupt (1=enable; 0=disable) 4 RME Controls the remote control timer (1=enable; 0=disable) 1=enable & start counting; 0=disable & clear the counter to 0 5 RMCS Selects the remote control timer clock source fX (1=fSYS; 0=fSYS/4) 6~7 RMS0 RMS1 Selects the remote control timer clock 00=fX/2 5 01= fX/2 6 10= fX/2 7 11= fX/2 8 RMTC (21H) Register Note: The RMT pin with rising/falling edge wake-up function, 8-bit timer counter will be cleared during a chip reset. |
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