2.18

ISW: inductor switching current limit

In order to allow low saturation current inductors to be used, the maximum DC-DC inductor switching current limit

threshold can be set by one I²C bit per section (ISW). Two values are available: 2.5 A typ. (with ISW = 1) and 4 A

typ. (with ISW = 0).

2.19

COMP: boost capacitors and inductor

The DC-DC converter compensation loop can be optimized in order to properly work with both ceramic and

“1” or “0” as follows:

COMP = 0 for electrolytic capacitors

COMP = 1 for ceramic capacitors

For recommended DC-DC capacitor and inductor values refer to Section 5 Typical application circuits and to the

BOM in Table 4. LNBH26S DiSEqC 1.x bill of material.

2.20

OLF: overcurrent and short-circuit protection and diagnostic

In order to reduce the total power dissipation during an overload or a short-circuit condition, each section of the

device is provided with a dynamic short-circuit protection. It is possible to set the short-circuit current protection

either statically (simple current clamp) or dynamically by the corresponding PCL bit of the I²C DATA3 register.

When the PCL (pulsed current limiting) bit is set lo LOW, the overcurrent protection circuit works dynamically: as

the corresponding TIMER bit programmed in the DATA3 register) and after that, the output is set in shutdown for a

is set to “1” and the FLT pin is set to low level. After this time has elapsed, the involved output is resumed for a

1080 ms (if TIMER=1) and is determined by an internal timer. This dynamic operation can greatly reduce the

power dissipation in short-circuit condition, still ensuring excellent power-on startup in most conditions. However,

there may be some cases in which a highly capacitive load on the output can cause a difficult startup when the

dynamic protection is chosen. This can be solved by initiating any power startup in static mode (PCL=1) and then,

switching to dynamic mode (PCL=0) after a chosen amount of time, depending on the output capacitance. Also in

static mode, the diagnostic OLF bit goes to “1” (and the FLT pin is set to low) when the current clamp limit is

reached and returns LOW when the overload condition is cleared and register reading is done.

After the overload condition is removed, normal operation can be resumed in two ways, according to the OLR I²C

bit on the DATA4 register.

pin) is disabled. To re-enable the output stage, the VSEL bits must be set again by the microprocessor and the

OLF bit is reset to “0” after a register reading operation.

If OLR=0, the involved output is automatically re-enabled as soon as the overload condition is removed, and the

OLF bit is reset to “0” after a register reading operation.

2.21

OTF: thermal protection and diagnostic

The LNBH26S is also protected against overheating: when the junction temperature exceeds 150 °C (typ.), the

step-up converter and both liner regulators are shut off, the diagnostic OTF bit in the STATUS1 register is set to

“1” and the FLT pin is set to low level. After the overtemperature condition is removed, normal operation can be

resumed in two ways, according to the THERM I²C bit on the DATA4 register.

stages, the VSEL bits must be set again by the microprocessor, while the OTF bit is reset to “0” after a register

reading operation.

If THERM=0, outputs are automatically re-enabled as soon as the overtemperature condition is removed, while

the OTF bit is reset to “0” after a register reading operation.

LNBH26S

ISW: inductor switching current limit

DS8975 - Rev 5

page 7/35