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LNBH26S Datasheet(PDF) 3 Page - STMicroelectronics

Part # LNBH26S
Description  Dual LNBS supply and control I2C with step-up and IC interface
PDF  35 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

LNBH26S Datasheet(HTML) 3 Page - STMicroelectronics

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2
Application information (valid for each section A/B)
The LNBH26S includes two completely independent sections. Except for ISEL, VCC and I²C inputs, each circuit
can be separately controlled and have their independent external components. All the specifications below must
be considered equal for both sections (A/B).
This IC has a built-in DC-DC step-up converter that, from a single source (8 V to 16 V), generates the voltages
(VUP) that let the integrated LDO post-regulator (generating the 13 V / 18 V LNB output voltages plus the 22 kHz
DiSEqC™ tone) work with a minimum dissipated power of 0.5 W typ. @ 500 mA load (the LDO drop voltage is
internally kept at VUP - VOUT = 1 V typ.). The LDO power dissipation can be further reduced when 22 kHz tone
output is disabled by setting the LPM bit to “1” (see LPM function description). The IC is also provided with an
undervoltage lockout circuit that disables the whole circuit when the supplied VCC drops below a fixed threshold
(4.7 V typ.). The step-up converter soft-start function reduces the in-rush current during startup. The SS time is
internally fixed at 4 ms typ. to switch from 0 to 13 V, and 6 ms typ. to switch from 0 to 18 V.
2.1
DISEQC™ data encoding (DSQIN pin)
The internal 22 kHz tone generator is factory trimmed in accordance with the DiSEqC™ standards, and can be
activated in 3 different ways:
1.
by an external 22 kHz source DiSEqC™ data connected to the DSQIN logic pin (TTL compatible). In this
case the I²C tone control bits must be set: EXTM=TEN=1.
2.
by an external DiSEqC™ data envelope source connected to the DSQIN logic pin. In this case the I²C tone
control bits must be set: EXTM=0 and TEN=1.
3.
through the TEN I²C bit if the 22 kHz presence is requested in continuous mode. In this case the DSQIN TTL
pin must be pulled HIGH and the EXTM bit set to “0”.
Each of the above solutions requires that during the 22 kHz tone activation and/or DiSEqC™ data transmission,
the LPM bit must be set to “0” see Section 2.4 LPM (low power mode).
2.2
Data encoding by external 22 kHz tone TTL signal
In order to improve design flexibility an external tone signal can be input to the DSQIN pin by setting the EXTM bit
to “1”.
The DSQIN is a logic input pin which activates the 22 kHz tone to the VOUT pin, by using the LNBH26S integrated
tone generator.
The output tone waveforms are internally controlled by the LNBH26S tone generator in terms of rise/fall time and
tone amplitude, while, the external 22 kHz signal on the DSQIN pin is used to define the frequency and the duty
cycle of the output tone. A TTL compatible 22 kHz signal is required for the proper control of the DSQIN pin
function. Before sending the TTL signal on the DSQIN pin, the EXTM and TEN bits must be previously set to “1”.
As soon as the DSQIN internal circuit detects the 22 kHz TTL external signal code, the LNBH26S activates the 22
kHz tone on the VOUT output with about 1 µs delay from TTL signal activation, and it stops with about 60 µs delay
after the 22 kHz TTL signal on DSQIN has expired, refer to Figure 2. Tone enable and disable timing (using
external waveform).
Figure 2. Tone enable and disable timing (using external waveform)
~ 1 µs
~ 60 µs
DSQIN
Tone
output
GIPG2601151219LM
LNBH26S
Application information (valid for each section A/B)
DS8975 - Rev 5
page 3/35



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