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L9654 Datasheet(PDF) 46 Page - STMicroelectronics

Part # L9654
Description  Quad squib driver and dual sensor interface ASIC for safety application
PDF  59 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L9654 Datasheet(HTML) 46 Page - STMicroelectronics

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Functional description
L9654
46/59
DocID14218 Rev 3
4.14.1
Current sensor
Each output channel senses the current drawn by the remote satellite sensor; the circuit
modulates the load current into logic voltage levels for post processing by a Manchester
decoder. Each channel has an internal comparator with programmable currents trip points
selectable through the appropriate setting in the CCR Register for each of the 2 satellite
channels. The current sense comparator provides a hysteresis, which can be enabled
through appropriate setting in the CCR Register. Each comparator output has a de-glitch
filter as a function of the protocol speed as defined in the AC characteristic table. Each
current is limited to 150mA maximum and includes a fault timer.
If the output for a given channel is in current limited for a period of time exceeding the output
fault timer, the IC reports an over current fault via SPI and latches off the affected channel,
the channel remains in latch off mode until the user sends an SPI command to re-activate
the channel. When the output is shorted to battery, an internal comparator senses the output
voltage level then turns off an internal series transistor to provide blocking diode for the
current going through the output channel, the output resumes normal operation once the
fault condition is removed. The comparator has 20 to 50mV input offset to prevent turning off
the output under an open circuit condition. In case of loss of VCC all outputs remain off.
4.14.2
Manchester decoding
The L9654 decodes satellite messages based on Manchester decoding, each of the two
satellite channels has a Manchester decoder that can be enabled or disabled through the
CCR register. An example of Manchester decoding is given below; logic 0 is defined as a
signal transition from 0 to 1 at 50% Duty cycle, logic 1 is defined as a signal transition from 1
to 0 at 50% Duty cycle.
The IC starts decoding the satellite message after it receives two SYNC bits defined as logic
00, the SYNC bits are used to determine the bit rate of the incoming message and are used
as the time base in decoding the following bits; different bit rates ranges are programmable
via SPI, in case the measured bit rate obtained using the 2 SYNC bits doesn’t fall within the
range selected by the SPI as defined in Table 35, the device declares a bit time error,
reverts to the minimum bit time of the selected range, and waits for idle.
Figure 19. Manchester decoding



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