L9966 datasheet(66/122 Pages) STMICROELECTRONICS

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Table 48. VRS_A hysteresis value

Hysteresis current [HI]

Value

Unit

Correspondent value on

20 kΩ ext. resistor

Unit

Min

Typ

Max

UBSW = 7.5 V:36 V, VDD5V = 4.85 V:5.15 V, Tj-max = 150 °C unless otherwise specified.

HI1

4.5

7.5

µA

120

HI2

9.5

11.5

13.5

µA

230

HI3

16.5

23.5

µA

400

HI4

52.5

µA

1050

HI5

µA

1600

No Hyst

15.2.3

VRS_A – Fully adaptive hysteresis

To set the adaptive hysteresis on VRS_A configuration, bit VRS_CONF_MODE[0] has to be set to ‘1’. In this

configuration, VRS input differential signal is fed into a peak detector circuit and then quantized on 5 different

voltage levels, based on 4 PVi thresholds (see Table 49. Peak voltage value ranges). Default hysteresis current

after exiting reset is HI3.

Table 49. Peak voltage value ranges

Peak Voltage [PVi]

Min

Typ

Max

Unit

UBSW = 7.5 V:36 V, VDD5V = 4.85 V:5.15 V, Tj-max = 150 °C unless otherwise specified.

PV1

650

900

1100

PV2

1200

1500

1650

PV3

1800

2100

2350

PV4

2450

2800

3050

The quantized output is sent to a logic block (Hysteresis Selection Table) that chooses the proper hysteresis

value (HIi) depending on the input peak voltage (PVi), see Table 50. Peak voltage range correspondence with

hysteresis selection.

Table 50. Peak voltage range correspondence with hysteresis selection

Input Peak Voltage Range

Selected Hysteresis (HIi)

0 - PV1

HI1

PV1 – PV2

HI2

PV2 – PV3

HI3

PV3 – PV4

HI4

> PV4

HI5

Peak detector and Hysteresis Selection Table circuits are enabled by VRS_OUT signal according to

VRS_HYST_FB bit value in the VRS SPI register that establishes if the feedback signal is before or after the

filter time.

VRS input differential voltage is continuously acquired: its max value, reached while VRS_OUT signal is high

(hysteresis current off), is latched through the peak detector. Peak detector, in turn, defines the hysteresis current

value. Hysteresis current is turned on as soon as the VRS_OUT falls to zero and it is switched OFF at next

VRS_OUT rising edge.

Based on the hysteresis current, the signal is processed by a square circuit which processes the output signal of

the comparator, see Figure 35. VRS_A fully adaptive hysteresis.

L9966

VRS - Normal mode

DS12459 - Rev 10

page 66/122

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