L9961 datasheet(20/63 Pages) STMICROELECTRONICS

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Fault type

Assertion condition

IC reaction to

assertion

Release condition

IC reaction to flag

clear

Maskable

VB vs. sum of cells

plausibility fail

If the absolute value

of the difference

between VB_MEAS

and VCELL_SUM is

greater than

VB_VSUM_MAX_DIF

F_TH, the plausibility

check fail is

acknowledged

FAULTN line is

asserted

If the absolute value

of the difference

between VB_MEAS

and VCELL_SUM

falls below the

VB_VSUM_MAX_DIF

F_TH, the

VB_SUM_CHECK_F

AIL flag can be

cleared by MCU

FAULTN line is

released

VB_SUM_CHECK_F

AULTN_MSK masks

reaction on FAULTN

3.4.2.1

Electrical parameters

All parameters are tested and guaranteed in the following conditions, unless otherwise noted:

VB according operating range of Table 4; TJ according operating range of Table 7.

Table 13. Battery stack monitor external parameters

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

VB_RANGE

VB voltage input

measurement range

Design info

4.3

VB_RES

VB voltage measurement

resolution

Design info

6.1 (25 V/212)

NBIT

ADC bit number

Design info

bit

VBERR_1

VB voltage measurement

total

4.3 V<VB<7.5 V

-40 °C< TJ<105 °C

-150

150

VBERR_2

VB voltage measurement

total

7.5 V<VB<22.5 V

-40 °C< TJ<105 °C

-100

100

VBERR_3

VB voltage measurement

total

22.5 V<VB<25 V

-40 °C< TJ<105 °C

-150

150

VB_OV_TH

Programmable VB OV fault

threshold (8 bit)

VBOVTH=16VB_RES*CODE TestedbySCAN

NVB_OV_CNT_TH

Programmable VB OV event

counter threshold (4 bit)

Tested by SCAN

events

VB_UV_TH

Programmable VB UV fault

threshold (8 bit)

VBUVTH=16VB_RES*CODE TestedbySCAN

NVB_UV_CNT_TH

Programmable VB UV event

counter threshold (4 bit)

Tested by SCAN

events

VB_SUM_MAX_DIFF_TH

Programmable plausibility

check threshold between VB

and sum of cells (8 bit)

Tested by SCAN

3.4.3

Cell temperature monitor (NTC)

The NTC cell temperature monitoring voltage conversion routine monitors pack temperature by sensing the NTC

pin. This function is enabled by programming the NTC_EN bit: if disabled, no conversion occurs.

When NTC_EN = 1, the OD open-drain is switched ON at the beginning of the voltage conversion routine, prior to

the cells step execution. This allows voltage on the NTC pin to settle before NTC acquisition is performed. Once

the NTC is completed, the OD open-drain switch is released, reducing overall current consumption from VREG.

L9961

Voltage conversion routine

DS14012 - Rev 1

page 20/63

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