STM32W108HB datasheet(165/278 Pages) STMICROELECTRONICS

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STM32W108HB STM32W108CC STM32W108CB STM32W108CZ

General-purpose timers

Doc ID 16252 Rev 14

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10.1.3

Clock selection

The counter clock can be provided by the following clock sources:

●

Internal clock (PCLK)

●

External clock mode 1: external input pin (TIy)

●

External clock mode 2: external trigger input (ETR)

●

Internal trigger input (ITR0): using the other timer as prescaler. Refer to the Using one

timer as prescaler for the other timer for more details.

Internal clock source (CK_INT)

The internal clock is selected when the slave mode controller is disabled (SMS = 000 in the

TIMx_SMCR register). In this mode, the CEN, DIR (in the TIMx_CR1 register), and UG bits

(in the TIMx_EGR register) are actual control bits and can be changed only by software,

except for UG, which remains cleared automatically. As soon as the CEN bit is written to 1,

the prescaler is clocked by the internal clock CK_INT.

Figure 26 shows the behavior of the control circuit and the up-counter in normal mode,

without prescaling.

Figure 26.

Control circuit in Normal mode, internal clock divided by 1

External clock source mode 1

This mode is selected when SMS = 111 in the TIMx_SMCR register. The counter can count

at each rising or falling edge on a selected input.

CK_INT

Counter clock = CK_CNT = CK_PSC

COUNTER REGISTER

01 02 03 04 05 06 07

32 33 34 35 36

CEN=CNT_EN

CNT_INIT

STM32W108HB Datasheet(PDF) 165 Page - STMicroelectronics