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STM32W108HB Datasheet(PDF) 177 Page - STMicroelectronics |
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STM32W108HB Datasheet(HTML) 177 Page - STMicroelectronics |
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177 / 278 page ![]() STM32W108HB STM32W108CC STM32W108CB STM32W108CZ General-purpose timers Doc ID 16252 Rev 14 177/278 Figure 38. Example of one pulse mode For example, to generate a positive pulse on OC1 with a length of tPULSE and after a delay of tDELAY as soon as a rising edge is detected on the TI2 input pin, using TI2FP2 as trigger 1: ● Map TI2FP2 on TI2 by writing IC2S = 01 in the TIMx_CCMR1 register. ● TI2FP2 must detect a rising edge. Write CC2P = 0 in the TIMx_CCER register. ● Configure TI2FP2 as trigger for the slave mode controller (TRGI) by writing TS = 110 in the TIMx_SMCR register. ● TI2FP2 is used to start the counter by writing SMS to 110 in the TIMx_SMCR register (trigger mode). ● The OPM waveform is defined: Write the compare registers, taking into account the clock frequency and the counter prescaler. The tDELAY is defined by the value written in the TIMx_CCR1 register. The tPULSE is defined by the difference between the auto-reload value and the compare value (TIMx_ARR - TIMx_CCR1). To build a waveform with a transition from 0 to 1 when a compare match occurs and a transition from 1 to 0 when the counter reaches the auto-reload value, enable PWM mode 2 by writing OC1M = 111 in the TIMx_CCMR1 register. Optionally, enable the buffer registers by writing OC1PE = 1 in the TIMx_CCMR1 register and ARPE in the TIMx_CR1 register. In this case, also write the compare value in the TIMx_CCR1 register, the auto-reload value in the TIMx_ARR register, generate an update by setting the UG bit, and wait for external trigger event on TI2. CC1P is written to 0 in this example. In the example, the DIR and CMS bits in the TIMx_CR1 register should be low. Since only one pulse is desired, software should set the OPM bit in the TIMx_CR1 register to stop the counter at the next update event (when the counter rolls over from the auto- reload value back to 0). |
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