STM32W108HB datasheet(173/278 Pages) STMICROELECTRONICS

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STM32W108HB STM32W108CC STM32W108CB STM32W108CZ

General-purpose timers

Doc ID 16252 Rev 14

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To control the output waveform, software can update the TIMx_CCRy register at any time,

provided that the buffer register is not enabled (OCyPE = 0). Otherwise TIMx_CCRy shadow

Figure 35.

Output compare mode, toggle on OC1

10.1.9

PWM mode

Pulse width modulation mode allows you to generate a signal with a frequency determined

by the value of the TIMx_ARR register, and a duty cycle determined by the value of the

TIMx_CCRy register.

PWM mode can be selected independently on each channel (one PWM per OCy output) by

writing 110 (PWM mode 1) or 111 (PWM mode 2) in the OCyM bits in the TIMx_CCMR1

TIMx_CCMR1 register. Finally, in up-counting or center-aligned mode the auto-reload buffer

Because the buffer registers are only transferred to the shadow registers when an update

event occurs, before starting the counter initialize all the registers by setting the UG bit in the

TIMx_EGR register.

OCy polarity is software programmable using the CCyP bit in the TIMx_CCER register. It

can be programmed as active high or active low. OCy output is enabled by the CCyE bit in

the TIMx_CCER register. Refer to the TIMx_CCER register description in the Registers

section for more details.

In PWM mode (1 or 2), TIMx_CNT and TIMx_CCRy are always compared to determine

whether TIMx_CCRy

≤TIMx_CNT or TIMx_CNT ≤TIMx_CCRy,depending on the direction of

the counter. The OCyREF signal is asserted only:

●

When the result of the comparison changes, or

●

When the output compare mode (OCyM bits in the TIMx_CCMR1 register) switches

from the "frozen" configuration (no comparison, OCyM = 000) to one of the PWM

modes (OCyM = 110 or 111).

OC1REF=OC1

TIMx_CNT

B200

B201

0039

TIMx_CCR1

003A

Write B201h in the TIMx_CCR1 register

Match detected on TIMx_CCR1

Interrupt generated if enabled

003B

B201

003A

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