STM32W108HB datasheet(172/278 Pages) STMICROELECTRONICS

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General-purpose timers

STM32W108HB STM32W108CC STM32W108CB STM32W108CZ

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Doc ID 16252 Rev 14

10.1.7

Forced output mode

In output mode (CCyS bits = 00 in the TIMx_CCMR1 register), software can force each

output compare signal (OCyREF and then OCy) to an active or inactive level independently

of any comparison between the output compare register and the counter.

To force an output compare signal (OCyREF/OCy) to its active level, write 101 in the OCyM

bits in the corresponding TIMx_CCMR1 register. OCyREF is forced high (OCyREF is always

active high) and OCy gets the opposite value to the CCyP polarity bit. For example,

CCyP = 0 defines OCy as active high, so when OCyREF is active, OCy is also set to a high

level.

The OCyREF signal can be forced low by writing the OCyM bits to 100 in the TIMx_CCMR1

The comparison between the TIMx_CCRy shadow register and the counter is still performed

and allows the CCyIF flag to be set. Interrupt requests can be sent accordingly. This is

described in Section 10.1.8: Output compare mode on page 172.

10.1.8

Output compare mode

This mode is used to control an output waveform or to indicate when a period of time has

elapsed.

When a match is found between the capture/compare register and the counter, the output

compare function:

●

Assigns the corresponding output pin to a programmable value defined by the output

compare mode (the OCyM bits in the TIMx_CCMR1 register) and the output polarity

(the CCyP bit in the TIMx_CCER register). The output can remain unchanged

(OCyM = 000), be set active (OCyM = 001), be set inactive (OCyM = 010), or can

toggle (OCyM = 011) on the match.

●

Sets a flag in the interrupt flag register (the CCyIF bit in the TIMx_SR register).

●

Generates an interrupt if the corresponding interrupt mask is set (the CCyIE bit in the

TIMx_IER register).

The TIMx_CCRy registers can be programmed with or without buffer registers using the

OCyPE bit in the TIMx_CCMR1 register.

In output compare mode, the update event has no effect on OCyREF or the OCy output.

The timing resolution is one count of the counter. Output compare mode can also be used to

output a single pulse (in one pulse mode).

Procedure:

Select the counter clock (internal, external, and prescaler).

Write the desired data in the TIMx_ARR and TIMx_CCRy registers.

Set the CCyIE bit in TIMx_IER if an interrupt request is to be generated.

Select the output mode. For example, you must write OCyM = 011, OCyPE = 0,

CCyP = 0 and CCyE = 1 to toggle the OCy output pin when TIMx_CNT matches

TIMx_CCRy, TIMx_CCRy buffer is not used, OCy is enabled and active high.

Enable the counter by setting the CEN bit in the TIMx_CR1 register.

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