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STM32W108HB Datasheet(PDF) 201 Page - STMicroelectronics

Part # STM32W108HB
Description  High-performance, IEEE 802.15.4 wireless system-on-chip with up to 256 Kbytes of embedded Flash memory
PDF  278 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32W108HB Datasheet(HTML) 201 Page - STMicroelectronics

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STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
General-purpose timers
Doc ID 16252 Rev 14
201/278
10.3.8
Timer x capture/compare mode register 1 (TIMx_CCMR1)
Address offset: 0xE018 (TIM1) and 0xF018 (TIM2)
Reset value:
0x0000 0000
The timer channels can be programmed as inputs (capture mode) or outputs (compare
mode). The direction of a channel “y” is defined by configuring the corresponding CCyS bits
in this register. All other bits have different functions in input and in output mode. For a given
bit:
●
OCxy describes its function when the channel is configured as an output (CCyS = 0)
●
ICxy describes its function when the channel is configured as an input (CCyS > 0)
In short, the same bit can have a different meaning for the input stage and for the output
stage. Care should be taken.
Output compare mode
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reserved
OC2M[2:0]
OC2PE
OC2FE
CC2S[1:0]
Reserved
OC1M[2:0]
OC1PE
OC1FE
CC1S[1:0]
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
Bits [31:15] Reserved, must be kept at reset value
Bits [14:12] OC2M[2:0]: Output Compare 2 Mode
Defines the behavior of the output reference signal OC2REF from which OC2 derives.
OC2REF is active high whereas OC2''s active level depends on the CC2P bit.
000: Frozen - The comparison between the output compare register TIMx_CCR2 and the
counter TIMx_CNT has no effect on the outputs.
001: Set OC2REF to active on match. The OC2REF signal is forced high when the counter
TIMx_CNT matches the capture/compare register 2 (TIMx_CCR2).
010: Set OC2REF to inactive on match. OC2REF signal is forced low when the counter
TIMx_CNT matches the capture/compare register 2 (TIMx_CCR2).
011: Toggle - OC2REF toggles when TIMx_CNT = TIMx_CCR2
100: Force OC2REF inactive
101: Force OC2REF active
110: PWM mode 1 - In up-counting, OC2REF is active as long as TIMx_CNT < TIMx_CCR2,
otherwise OC2REF is inactive. In down-counting, OC2REF is inactive if
TIMx_CNT > TIMx_CCR2, otherwise OC2REF is active.
111: PWM mode 2 - In up-counting, OC2REF is inactive if TIMx_CNT < TIMx_CCR2,
otherwise OC2REF is active. In down-counting, OC2REF is active if
TIMx_CNT > TIMx_CCR2, otherwise it is inactive.
Note: In PWM mode 1 or 2, the OC2REF level changes only when the result of the
comparison changes or when the output compare mode switches from “frozen” mode to
“PWM” mode.



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