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STM32W108HB Datasheet(PDF) 209 Page - STMicroelectronics |
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STM32W108HB Datasheet(HTML) 209 Page - STMicroelectronics |
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209 / 278 page ![]() STM32W108HB STM32W108CC STM32W108CB STM32W108CZ General-purpose timers Doc ID 16252 Rev 14 209/278 10.3.10 Timer x capture/compare enable register (TIMx_CCER) Address offset: 0xE020 (TIM1) and 0xF020 (TIM2) Reset value: 0x0000 0000 Reserved, must be kept at reset value CC4P: Capture/Compare 4 output Polarity CC4E: Capture/Compare 4 output Enable Reserved, must be kept at reset value CC3P: Refer to the CC4P description above CC3E: Refer to the CC4E description above Reserved, must be kept at reset value CC2P: Refer to the CC4P description above CC2E: Refer to the CC4E description above Reserved, must be kept at reset value CC1P: Refer to the CC4P description above CC1E: Refer to the CC4E description above 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Reserved 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reserved CC4P CC4E Reserved CC3P CC3E Reserved CC2P CC2E Reserved CC1P CC1E rw rw rw rw rw rw rw rw Bits [31:14] Bit 13 If CC4 is configured as an output channel: 0: OC4 is active high 1: OC4 is active low. If CC4 configured as an input channel: 0: IC4 is not inverted. Capture occurs on a rising edge of IC4. When used as an external trigger, IC4 is not inverted. 0: IC4 is inverted. Capture occurs on a falling edge of IC4. When used as an external trigger, IC4 is inverted. 1: Capture is enabled Bit 12 If CC4 is configured as an output channel: 0: OC4 is disabled 1: OC4 is enabled If CC4 configured as an input channel: 0: Capture is disabled 1: Capture is enabled Bits [11:10] Bit 9 Bit 8 Bits [7:6] Bit 5 Bit 4 Bits [3:2] Bit 1 Bit 0 |
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