HC08KL8GRSSLASHD datasheet(86/256 Pages) NXP

86 / 256 page

System Integration Module (SIM)

General Release Specification

MC68HC08KL8 — Rev. 2.0

System Integration Module (SIM)

8.4.2.2 Computer Operating Properly (COP) Reset

An input to the SIM is reserved for the COP reset signal. The overflow of

the COP counter causes an internal reset and sets the COP bit in the

reset status register (RSR). The SIM actively pulls down the RST pin for

all internal reset sources.

To prevent a COP module timeout, write any value to location $FFFF.

Writing to location $FFFF clears the COP counter and stages 12 through

5 of the SIM counter. The SIM counter output, which occurs at least

every 212 – 24 CGMXCLK cycles, drives the COP counter. The COP

should be serviced as soon as possible out of reset to guarantee the

maximum amount of time before the first timeout.

The COP module is disabled if the RST pin or the IRQ1 pin is held at

VTST while the MCU is in monitor mode. The COP module can be

disabled only through combinational logic conditioned with the high

voltage signal on the RST or the IRQ1 pin. This prevents the COP from

becoming disabled as a result of external noise. During a break state,

VTST on the RST pin disables the COP module.

8.4.2.3 Illegal Opcode Reset

The SIM decodes signals from the CPU to detect illegal instructions. An

illegal instruction sets the ILOP bit in the reset status register (RSR) and

causes a reset.

If the stop enable bit, STOP, in the mask option register is logic 0, the

SIM treats the STOP instruction as an illegal opcode and causes an

illegal opcode reset. The SIM actively pulls down the RST pin for all

internal reset sources.

8.4.2.4 Illegal Address Reset

An opcode fetch from an unmapped address generates an illegal

address reset. The SIM verifies that the CPU is fetching an opcode prior

to asserting the ILAD bit in the reset status register (RSR) and resetting

the MCU. A data fetch from an unmapped address does not generate a

reset. The SIM actively pulls down the RST pin for all internal reset

sources.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC08KL8GRS/D Datasheet(PDF) 86 Page - NXP Semiconductors