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HC08KL8GRS/D Datasheet(PDF) 95 Page - NXP Semiconductors |
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HC08KL8GRS/D Datasheet(HTML) 95 Page - NXP Semiconductors |
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95 / 256 page ![]() System Integration Module (SIM) Exception Control MC68HC08KL8 — Rev. 2.0 General Release Specification System Integration Module (SIM) 8.6.3 Reset All reset sources always have equal and highest priority and cannot be arbitrated. 8.6.4 Break Interrupts The break module can stop normal program flow at a software- programmable break point by asserting its break interrupt output. (See Section 16. Break Module (BREAK).) The SIM puts the CPU into the break state by forcing it to the SWI vector location. Refer to the break interrupt subsection of each module to see how each module is affected by the break state. 8.6.5 Status Flag Protection in Break Mode The SIM controls whether status flags contained in other modules can be cleared during break mode. The user can select whether flags are protected from being cleared by properly initializing the break clear flag enable bit (BCFE) in the break flag control register (BFCR). Protecting flags in break mode ensures that set flags will not be cleared while in break mode. This protection allows registers to be freely read and written during break mode without losing status flag information. Setting the BCFE bit enables the clearing mechanisms. Once cleared in break mode, a flag remains cleared even when break mode is exited. Status flags with a 2-step clearing mechanism — for example, a read of one register followed by the read or write of another — are protected, even when the first step is accomplished prior to entering break mode. Upon leaving break mode, execution of the second step will clear the flag as normal. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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