STM32U535NET6QTR datasheet(130/278 Pages) STMICROELECTRONICS

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Electrical characteristics

STM32U535xx

130/278

DS14217 Rev 1

VIN

(4)

Input voltage on FT_c pins

VSS - 0.3

5.5

Input voltage on any other pins

VSS - 0.3

4.0

VREF+ - VDDA

Allowed voltage difference for

VREF+ > VDDA

-0.4

|∆VDDx|

Variations between different VDDx

power pins of the same domain

-50.0

|VSSx-VSS|

Variations between all the different

ground pins(7)

-50.0

1. All main power (VDD, VDDSMPS, VDDA, VDDUSB, VDDIO2, VBAT) and ground (VSS, VSSA, VSSSMPS) pins must

always be connected to the external power supply, in the permitted range.

2. The I/O structure options listed in this table can be a concatenation of options including the option explicitly listed. For

instance TT_a refers to any TT I/O with _a option. TT_xx refers to any TT I/O and FT_xx refers to any FT I/O.

3. VDDIO1 or VDDIO2, VDDIO1 = VDD.

4. VIN maximum must always be respected. Refer to Table 30 for the maximum allowed injected current values.

5. To sustain a voltage higher than 4 V, the internal pull-up/pull-down resistors must be disabled.

6. This formula has to be applied only on the power supplies related to the I/O structure described in the pin definition table.

7. Including VREF- pin.

Table 29. Voltage characteristics(1)(2) (continued)

Symbol

Ratings

Min

Max

Unit

Table 30. Current characteristics

Symbol

Ratings

Max

Unit

∑IVDD

Total current into sum of all VDD power lines (source)(1)

200

∑IVSS

Total current out of sum of all VSS ground lines (sink)(1)

200

IVDD

Maximum current into each VDD power pin (source)(1)

100

IVSS

Maximum current out of each VSS ground pin (sink)(1)

100

IIO

Output current sunk by any I/O and control pin

∑I(PIN)

Total output current sunk by sum of all I/Os and control pins(2)

120

Total output current sourced by sum of all I/Os and control pins(2)

120

IINJ(PIN)(3)(4) Injected current on FT_xx, TT_xx, RST pins

-5/+0

∑|IINJ(PIN)|

Total injected current (sum of all I/Os and control pins)(5)

±25

1. All main power (VDD, VDDSMPS, VDDA, VDDUSB, VDDIO2, VBAT) and ground (VSS, VSSA, VSSSMPS) pins must

always be connected to the external power supplies, in the permitted range.

2. This current consumption must be correctly distributed over all I/Os and control pins. The total output current must not be

sunk/sourced between two consecutive power supply pins, referring to high pin count QFP packages.

3. Positive injection (when VIN > VDDIOx) is not possible on these I/Os and does not occur for input voltages lower than the

specified maximum value.

4. A negative injection is induced by VIN < VSS. IINJ(PIN) must never be exceeded. Refer also to Table 29 for the minimum

allowed input voltage values.

5. When several inputs are submitted to a current injection, the maximum ∑|IINJ(PIN) is the absolute sum of the negative

injected currents (instantaneous values).

STM32U535NET6QTR Datasheet(PDF) 130 Page - STMicroelectronics

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