AT25QL641 datasheet(38/80 Pages) RENESAS

38 / 80 page

DS-AT25QL641-130 Rev. G

Page 38

Sep 14, 2022

AT25QL641 Datasheet

8.16 Quad Page Program (33h)

The Quad Page Program command is to program the memory as being 0 at previously erased memory areas.

The Quad Page Program requires four pins: I/O0, I/O1, I/O2, and I/O3, as address and data inputs, which can

improve performance. A system using a faster clock speed does not get more benefit for the Quad Page Program

as the required internal page program time is far more than the time data clock-in.

To use Quad Page Program command, the Quad Enable bit must be set. A Write Enable command must be

executed before the device accepts the Quad Page Program command (Status Register-1, WEL = 1). The

command is initiated by driving the CS pin low then sending the command code 33h followed by a 24-bit address

(A23-A0) and at least one data, into the I/O pins. The CS pin must be held low for the entire length of the

command while data is being sent to the device. All other functions of Quad Page Program command are the

same as the standard Page Program command. (See Figure 27 and Figure 28.)

Figure 27. Quad Page Program Command (SPI mode)

SCK

123

10 11 12 13

13 14 15 16 17 18 19

Mode 3

Mode 0

Mode 3

Mode 0

Command

33h

A23-16

A15-8

A7-0

Byte 1

Byte 2

Byte 3

Byte 253 Byte 254

Byte 255 Byte 256

MSB

AT25QL641 Datasheet(PDF) 38 Page - Renesas Technology Corp