AT25QL641 datasheet(18/80 Pages) RENESAS

18 / 80 page

DS-AT25QL641-130 Rev. G

Page 18

Sep 14, 2022

AT25QL641 Datasheet

Commands

The SPI command set of the AT25QL641 consists of thirty eight basic commands and the QPI command set of

the AT25QL641 consists of thirty one basic commands that are fully controlled through the SPI bus (see Table 8

through Table 11). Commands are initiated with the falling edge of Chip Select (CS). The first byte of data clocked

into the input pins (SI or I/O [3:0]) provides the command code. Data on the SI input is sampled on the rising edge

of clock with most significant bit (MSB) first.

Commands are completed with the rising edge of edge CS. All read commands can be completed after any

clocked bit. However, all commands that Write, Program or Erase must complete on a byte (CS driven high after

the full 8 bits has been clocked) otherwise the command is terminated. This feature further protects the device

from inadvertent writes. Additionally, while the memory is being programmed or erased, or when the Status

completed.

Table 7. Manufacturer and Device Identification

ID code

Command

Manufacturer ID

Renesas Electronics

1Fh

90h, 92h, 94h, 9Fh

Device ID

AT25QL641

16h

90h, 92h, 94h, ABh

Memory Type ID

SPI / QPI

43h

9Fh

Capacity Type ID

64M

17h

9Fh

AT25QL641 Datasheet(PDF) 18 Page - Renesas Technology Corp