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M95P16-EXCS/EF Datasheet(PDF) 5 Page - STMicroelectronics |
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M95P16-EXCS/EF Datasheet(HTML) 5 Page - STMicroelectronics |
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5 / 63 page ![]() 2 Memory 2.1 Block diagram The device (see Figure 3) contains the memory array, the registers, the identification pages, the high voltage, and the decoding blocks. The memory array is divided into 4096 erasable pages of 512 bytes. The PEC (program erase controller) executes all the algorithms, managing the correct execution of erase and program operations. It improves the cycling and data retention performance, and keeps erase and program times at the typical value during the whole product operating life. A Deep power down mode is available to minimize the power consumption (switching OFF the circuitry of several internal blocks). In this configuration, the current consumption is reduced to ICC2 (see Table 23. DC characteristics - Current consumption - M95P16-I and Table 24. DC characteristics - Current consumption - M95P16-E). Figure 3. Block diagram Memory array Registers Identification pages Sense amps + Decoder Y Pads Program, erase and read controller + PEC SPI Power mgmt OFF in Deep power down M95P16-I M95P16-E Memory DS13710 - Rev 1 page 5/63 |
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