M95P16-EXCSSLASHEF datasheet(33/63 Pages) STMICROELECTRONICS

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Due to the ECC architecture, the Page program operation can be executed only once within a data word of 16

bytes (modulo 16). The operation is limited to writing bytes within a single physical page (where address A23 to

A9 are the same), regardless of the number of bytes being programmed. After each data byte is received, the

address on the nine lowest-order address bits (A8 to A0) is internally incremented by one, and the remaining

bits (A23 to A9) remain constant. If more than 512 bytes are transmitted, the address counter rolls over to the

beginning of the same page, and the previously stored data is overwritten.

6.14.2

Page program with buffer load (0Ah)

Similarly to the Page program instruction, the Page program with buffer load (PGPR) instruction allows from one

to 512 bytes of data, initially in the erased state (FFh), to be programmed. It also allows the buffer of 512 data

bytes for the next page program operation to be loaded during page program execution.

The buffer mode must be activated by setting the buffer loading activation bit (BUFEN) to 1 (see

Section 5.3 Volatile register format).

A Write enable instruction must be executed before the device accepts a Page program instruction (Status

The Page program with buffer load instruction is initiated by driving pin S low, then shifting-in the instruction code

0Ah, followed by a 24-bit address (A23-A0) and at least one data byte into the D-DQ0 pin. The S pin must be held

low for the whole length of the instruction. The S pin must be driven high after the eighth bit of the last byte has

been latched. After S is driven high, the self-timed Page program instruction starts for a time duration of tPP (see

Table 26. Programming times). The sequence is shown in Figure 24.

While the self-timed Page program is in progress, and if buffer is available (BUFLD equal to 0), a new page

program instruction (no WREN needed) can be sent. This new page program command is executed with the

information stored in the buffer as soon as the ongoing page program execution is complete.

•

If the buffer is empty, the device waits for a new Page program instruction.

•

If the buffer is not available (BUFLD equal to 1), the user must wait for the buffer free ((BUFLD equal to 0)

before sending a new page program instruction.

•

The Read Volatile register instruction (RDVR) allows buffer status to be checked.

To exit from Buffer mode, the volatile configuration bit (BUFEN) in the Volatile register must be reset to 0. See

Section 6.7 Write Volatile register (81h).

Table 12. Buffer load

BUFEN

WIP

BUFLD

Description

Buffer mode inactive.

BUFLD is always at 1 when BUFEN is at 0 (Buffer mode not active).

Buffer mode activated.

All the buffers are empty, Page program allowed.

Buffer mode activated.

A buffer is empty and Page program is ongoing.

New Page program authorized to load the available buffer.

Buffer mode activated.

All buffers are full and Page program is ongoing.

New Page program not allowed.

Caution:

In Buffer mode, only a reduced set of instructions is decoded to allow programming of a selected area.

When programming is complete, the BUFEN flag must be reset to enable the device to decode the full set

of instructions. In particular, to check programmed content, the user must exit from Buffer mode to launch a

READ instruction over the programmed area.

M95P16-I M95P16-E

Page program operations

DS13710 - Rev 1

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