DSP56600FMSLASHAD datasheet(4/76 Pages) NXP

4 / 76 page

Preliminary

DSP56652 Technical Data Sheet

MOTOROLA

DSP56652

Features

On-chip Memories

´ 32-bit MCU ROM

512

´ 32-bit MCU RAM

48K

´ 24-bit DSP program ROM

512

´ 24-bit DSP program RAM

20K

´ 16-bit DSP data ROM, split into 10K x 16-bit each of X and Y data ROM spaces

14K

´ 16-bit DSP data RAM, split into (7 + 1)K ´ 16-bit X data RAM and 6K x 16-bit

Y data RAM spaces

On-chip Peripherals

Fully programmable phase-locked loop (PLL) for DSP clock generation

External interface module (EIM) for glueless system integration

External 22-bit address and 16-bit data MCU buses

Thirty-two source MCU interrupt controller

Intelligent MCU/DSP interface (MDI) dual 1K x 16-bit RAM (shares 1K DSP X data

RAM) with messaging status and control

Serial audio codec port

Serial baseband codec port

Protocol timer frees the MCU from radio channel timing events

Queued serial peripheral interface (SPI)

Keypad port capable of scanning up to an 8

´ 8 matrix keypad

General-purpose MCU and DSP timers

Pulse width modulation output

Universal asynchronous receiver/transmitter (UART) with FIFO

IEEE 1149.1-compliant boundary scan JTAG Test access port (TAP)

Integrated DSP/M¥CORE On-Chip Emulation (OnCEª) module

DSP address bus visibility mode for system development

ISO 7816-compatible Smart Card port

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

DSP56600FM/AD Datasheet(PDF) 4 Page - NXP Semiconductors