M24256X-F datasheet(8/42 Pages) STMICROELECTRONICS

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Sending more than one byte abort the write cycle (SWP register content does not change).

The description of the software write protection register is given in the table below:

Table 4. Software write protection register

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

x (1)

x(1)

WPA

BP1

BP0

WPL

1. x = Don’t care bits, read as 0.

Note:

Factory delivery of the register is 00000000b.

Bits

b7:b4

Don’t care bits - Read as '0'. (b7, b6, b5, b4) = (0, 0, 0, 0)

Bit b3

WPA: write protect activation bit.

b3 enables or disables the write protection:

•

b3 = 0: no write protection. The whole memory can be written.

•

b3 = 1: write protection active. The memory block is protected according to BP bits setting.

Bits

b2:b1

BP1, BP0: block protection bits

b2 and b1 define the size of the memory block to be protected against write instruction:

•

(b2, b1) = (0, 0): the upper quarter of memory is write-protected

•

(b2, b1) = (0, 1): the upper half of memory is write protected

•

(b2, b1) = (1, 0): the upper ¾ of memory is write protected

•

(b2, b1) = (1, 1): the whole memory is write protected

Bit b0

WPL: write protect lock bit

b0 locks the write protection register value.

•

b0 = 0: bits [b3: b0] can be modified

•

b0 = 1: bits [b3: b0] cannot be modified and therefore the write protection register is frozen.

Note:

bits b3 to b0 can be updated (if b0 = 0) in the same write instruction. Setting b0 from 0 to 1 is an

irreversible action.

M24256X-F

Software write protection register (SWP)

DS12380 - Rev 2

page 8/42

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