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MPC750EC/D Datasheet(PDF) 20 Page - NXP Semiconductors |
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MPC750EC/D Datasheet(HTML) 20 Page - NXP Semiconductors |
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20 / 44 page ![]() 20 MPC750A RISC Microprocessor Hardware Specifications Electrical and Thermal Characteristics Figure 9. L2 Bus Output Timing Diagrams 1.4.3 IEEE 1149.1 AC Timing Specifications Table 14 provides the IEEE 1149.1 (JTAG) AC timing specifications as defined in Figure 10, Figure 11, Figure 12, and Figure 13. Table 14. JTAG AC Timing Specifications (Independent of SYSCLK) At recommended operating conditions (See Table 3), CL = 50 pF Num Characteristic Min Max Unit Notes TCK frequency of operation 0 33.3 MHz 1 TCK cycle time 30 — ns 2 TCK clock pulse width measured at 1.4V 15 — ns 3 TCK rise and fall times 0 2 ns 4 Specification obsolete, intentionally omitted 5 TRST assert time 25 — ns 1 6 Boundary-scan input data setup time 4 — ns 2 7 Boundary-scan input data hold time 15 — ns 2 8 TCK to output data valid 4 20 ns 3 9 TCK to output high impedance 3 19 ns 3, 4 10 TMS, TDI data setup time 0 — ns 27 VM VM = Midpoint Voltage (1.4V) L2SYNC_IN 26 ALL OUTPUTS VM 28 L2DATA BUS Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com AR CH IVE D B Y F RE ES CA LE SE MI CO ND UC TO R, INC . |
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