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TMPR4925 Datasheet(PDF) 335 Page - Toshiba Semiconductor |
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TMPR4925 Datasheet(HTML) 335 Page - Toshiba Semiconductor |
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335 / 590 page ![]() Chapter 10 PCI Controller 10-73 10.4.45 P2G Memory Space 0 G-Bus Base Address Register (P2GM0GBASE) 0xD180 31 20 19 16 BA[31:20] Reserved R/W : Type 0x000 : Initial value 15 0 Reserved : Type : Initial value Bits Mnemonic Field Name Description 31:20 BA[31:20] Base Address Base Address 0 (Initial value: 0x000, R/W) Sets the G-Bus base bus address of Memory Space 0 for target access. Can set the base address from 1MB to 512-MB. 19:0 Reserved Figure 10.4.45 P2G Memory Space 0 G-Bus Base Address Register |
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