Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

Preview PDF HTML

TMPR4925 Datasheet(PDF) 304 Page - Toshiba Semiconductor

Part # TMPR4925
Description  64-Bit TX System RISC TX49 Family
PDF  590 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMPR4925 Datasheet(HTML) 304 Page - Toshiba Semiconductor

Back Button TMPR4925 Datasheet HTML 300Page - Toshiba Semiconductor TMPR4925 Datasheet HTML 301Page - Toshiba Semiconductor TMPR4925 Datasheet HTML 302Page - Toshiba Semiconductor TMPR4925 Datasheet HTML 303Page - Toshiba Semiconductor TMPR4925 Datasheet HTML 304Page - Toshiba Semiconductor TMPR4925 Datasheet HTML 305Page - Toshiba Semiconductor TMPR4925 Datasheet HTML 306Page - Toshiba Semiconductor TMPR4925 Datasheet HTML 307Page - Toshiba Semiconductor TMPR4925 Datasheet HTML 308Page - Toshiba Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 304 / 590 page
background image
Chapter 10 PCI Controller
10-42
10.4.16 Satellite Mode PCI Status Register (PCISSTATUS)
0xD088
The PCI Status, Command Register (PCISTATUS) or the PMCSR Register of the Configuration
Space cannot be accessed when the PCI Controller is in the Satellite mode. It is possible however to
read values from either of these registers.
31
26
25
24
23
16
Reserved
PS
Reserved
R: Type
00
: Initial value
15
14
13
12
11
10
9
8
7
0
DPE
SSE
RMA
RTA
STA
DT
MDPE
Reserved
RR
RR
R
R
R
: Type
0
0
0
0
0
01
0
: Initial value
Bits
Mnemonic
Field Name
Description
31:26
Reserved
25:24
PS
Power State
PowerState (Initial value: 00, R)
This is a shadow register of the PowerState field in the PMCSR Register.
23:16
Reserved
15
DPE
Detected Parity
Error
Detected Parity Error (Initial value: 0, R)
This is a shadow register of the PCISTATUS.DPE bit.
14
SSE
Signaled System
Error
Signaled System Error (Initial value: 0, R)
This is a shadow register of the PCISTATUS.SSE bit.
13
RMA
Received Master
Abort
Received Master Abort (Initial value: 0, R)
This is a shadow register of the PCISTATUS.RMA bit.
12
RTA
Received Target
Abort
Received Target Abort (Initial value: 0, R)
This is a shadow register of the PCISTATUS.RTA bit.
11
STA
Signaled Target
Abort
Signaled Target Abort (Initial value: 0, R)
This is a shadow register of the PCISTATUS.STA bit.
10:9
DT
Set DEVSEL
Timing
DEVSEL Timing (Fixed value: 01, R)
This is a shadow register of the PCISTATUS.DT field.
8MDPE
Data Parity
Detected
Master Data Parity Error Detected (Initial value: 0, R)
This is a shadow register of the PCISTATUS.MDPE bit.
7:0
Reserved
Figure 10.4.16 Satellite Mode PCI Status Register



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com