Nexperia

74ALVT16823

18-bit bus-interface D-type flip-flop with reset and enable; 3-state

Tamb = −40 °C to +85 °C

Symbol Parameter

Conditions

Min

Typ[1]

Max

Unit

VCC = 3.6 V; VI = GND or VCC; IO = 0 A

outputs HIGH-state

-

0.06

0.1

mA

outputs LOW-state

-

3.9

5.5

mA

ICC

supply current

outputs disabled

[6]

-

0.06

0.1

mA

ΔICC

additional supply current

per input pin; VCC = 3 V to 3.6 V;

one input at VCC - 0.6 V,

other inputs at VCC or GND

[7]

-

0.04

0.4

mA

CI

input capacitance

VI = 0 V or VCC

-

3

-

pF

CO

output capacitance

VI/O = 0 V or 3.0 V

-

9

-

pF

[1] All typical values for VCC = 2.5 V ± 0.2 V are measured at VCC = 2.5 V and Tamb = 25 °C.

All typical values for VCC = 3.3 V ± 0.3 V are measured at VCC = 3.3 V and Tamb = 25 °C.

[2] For valid test results, data must not be loaded into the flip-flops after applying power.

[3] Unused pins at VCC or GND.

[4] Not guaranteed.

[5] This parameter is valid for any VCC between 0 V and 1.2 V with a transition time of up to 10 ms.

From VCC = 1.2 V to VCC = 2.5 V ± 0.2 V a transition time of 100 μs is permitted. This parameter is valid for Tamb = 25 °C only.

[6] ICC is measured with outputs pulled up to VCC or pulled down to ground.

[7] This is the increase in supply current for each input at the specified voltage level other than VCC or GND.

[8] This is the bus hold overdrive current required to force the input to the opposite logic state.

[9] This parameter is valid for any VCC between 0 V and 1.2 V with a transition time of up to 10 ms.

From VCC = 1.2 V to VCC = 3.3 V ± 0.3 V a transition time of 100 μs is permitted. This parameter is valid for Tamb = 25 °C only.

10. Dynamic characteristics

Table 7. Dynamic characteristics

Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 9.

Tamb = −40 °C to +85 °C

Symbol Parameter

Conditions

Min

Typ[1]

Max

Unit

VCC = 2.5 V ± 0.2 V

tPLH

LOW to HIGH propagation delay

nCP to nQn; see Fig. 5

1.5

2.9

4.5

ns

nCP to nQn; see Fig. 5

1.4

2.7

4.2

ns

tPHL

HIGH-to-LOW propagation delay

nMR to nQn; see Fig. 7

1.5

2.7

4.2

ns

tPZH

OFF-state to HIGH propagation delay

nOE to nQn; see Fig. 8

2.1

3.4

5.0

ns

tPZL

OFF-state to LOW propagation delay

nOE to nQn; see Fig. 8

1.8

3.0

4.7

ns

tPHZ

HIGH to OFF-state propagation delay

nOE to nQn; see Fig. 8

1.7

3.0

4.3

ns

tPLZ

LOW to OFF-state propagation delay

nOE to nQn; see Fig. 8

1.4

2.3

3.3

ns

nDn to nCP; see Fig. 6

1.0

0.5

-

ns

tsu(H)

set-up time HIGH

nCE to nCP; see Fig. 6

1.0

0.2

-

ns

nDn to nCP; see Fig. 6

1.8

1.3

-

ns

tsu(L)

set-up time LOW

nCE to nCP; see Fig. 6

0.5

-0.1

-

ns

nDn to nCP; see Fig. 6

0.1

-1.4

-

ns

th(H)

hold time HIGH

nCE to nCP; see Fig. 6

1.0

0.2

-

ns

nDn to nCP; see Fig. 6

0.1

-0.5

-

ns

th(L)

hold time LOW

nCE to nCP; see Fig. 6

1.0

-0.1

-

ns

74ALVT16823

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© Nexperia B.V. 2020. All rights reserved

Product data sheet

Rev. 6 — 20 October 2020

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