UPD75P3018A datasheet(8/66 Pages) RENESAS

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µPD75P3018A

Data Sheet U11917EJ2V1DS

3. PIN FUNCTIONS

3.1 Port Pins (1/2)

Pin Name

I/O

Alternate Function

Function

8-bit

After Reset I/O Circuit

I/O

TypeNote 1

P00

Input

INT4

This is a 4-bit input port (PORT0).

—

Input

<B>

P01 to P03 are 3-bit pins for which an internal

P01

SCK

pull-up resistor connection can be specified

<F>-A

by software.

P02

SO/SB0

<F>-B

P03

SI/SB1

<M>-C

P10

Input

INT0

This is a 4-bit input port (PORT1).

—

Input

<B>-C

These are 4-bit pins for which an internal pull-up

P11

INT1

resistor connection can be specified by software.

P10/INT0 can select noise elimination circuit.

P12

TI1/TI2/INT2

P13

TI0

P20

I/O

PTO0

This is a 4-bit I/O port (PORT2).

—

Input

E-B

These are 4-bit pins for which an internal pull-up

P21

PTO1

resistor connection can be specified by software.

P22

PCL/PTO2

P23

BUZ

P30

I/O

LCDCL/MD0

This is a programmable 4-bit I/O port (PORT3).

—

Input

E-B

Input and output in single-bit units can be specified.

P31

SYNC/MD1

When set for 4-bit units, an internal pull-up resistor

connection can be specified by software.

P32

MD2

P33

MD3

P40Note 2

I/O

This is an N-ch open-drain 4-bit I/O port (PORT4).

√

High

M-E

When set to open-drain, voltage is 13 V.

impedance

P41Note 2

Also functions as data I/O pin (low-order 4 bits)

for program memory (PROM) write/verify.

P42Note 2

P43Note 2

P50Note 2

I/O

This is an N-ch open-drain 4-bit I/O port (PORT5).

High

M-E

When set to open-drain, voltage is 13 V.

impedance

P51Note 2

Also functions as data I/O pin (high-order 4 bits)

for program memory (PROM) write/verify.

P52Note 2

P53Note 2

Notes 1. Circuit types enclosed in brackets indicate Schmitt trigger input.

2. Low-level input leakage current increases when input instructions or bit manipulation instructions are executed.

UPD75P3018A Datasheet(PDF) 8 Page - Renesas Technology Corp

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