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TMD4903 Datasheet(PDF) 27 Page - OSRAM GmbH |
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TMD4903 Datasheet(HTML) 27 Page - OSRAM GmbH |
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27 / 86 page  Page 26 Datasheet, Public Document Feedback [v2-00] 2022-Nov-03 TMD4903 − Register Description Wait Time Register (WTIME 0x83) Figure 29: Wait Time Register 76 5 4 3 2 10 WTIME Field Bits Description WTIME 7:0 Wait Time. Sets the wait time between ALS cycles. Wait mode reduces current consumption. It is set in 2.78ms increments unless the WLONG bit is asserted in which case the wait times are 12x longer. The power on reset value is 0xFF. Wait time should be configured before AEN is asserted. VALUE WAIT TIME (WLONG=0) WAIT TIME (WLONG=1) 0xFF 2.78ms 0.03s 0xDC 100ms 1.20s … 2.78ms X (256 - WTIME) 33.3ms X (256 - WTIME) 0x6A 417ms 5.00s 0x00 711ms 8.53s |
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