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TMD4903 Datasheet(PDF) 30 Page - OSRAM GmbH |
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TMD4903 Datasheet(HTML) 30 Page - OSRAM GmbH |
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30 / 86 page  Datasheet, Public Page 29 [v2-00] 2022-Nov-03 Document Feedback TMD4903 − Register Description Configuration Register Zero (CFG0 0x8D) Figure 33: Configuration Register Zero 76 5 4 3 2 1 0 Reserved LOWPOWER_IDLE Reserved WLONG RAM_BANK Field Bits Description Reserved 7:6 Reserved LOWPOWER_IDLE 5 Low Power Idle. When asserted, the device will run in a low power mode if all functions are in wait states or disabled. Reserved 4:3 Reserved WLONG 2 Wait Long Enable. When asserted, the wait cycles are increased by a factor 12x. RAM_BANK 1:0 RAM Bank Selection. Specifies the RAM bank to access for IRBeam. VALUE RAM BANK ACCESS 0 Ram Bank 0 (lower 128 bytes) 1 Ram Bank 1 (upper 128 bytes) 2 Access is given to the 16 words at 0xB0… 0xBF. 3 |
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