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TMD4903 Datasheet(PDF) 35 Page - OSRAM GmbH |
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TMD4903 Datasheet(HTML) 35 Page - OSRAM GmbH |
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35 / 86 page  Page 34 Datasheet, Public Document Feedback [v2-00] 2022-Nov-03 TMD4903 − Register Description CRGB Data Registers (0x94 − 0x9B) Red, green, blue, and clear data are stored as 16-bit values. The read sequence must read byte pairs (low followed by high) starting on an even address boundary (0x94, 0x96, 0x98, or 0x9A) inside the CRGB Data Register block. In addition, reading the Clear channel data low byte (0x94) latches all 8 data bytes. Reading these 8 bytes consecutively (0x94 - 0x9A) ensures that the data is concurrent. Figure 40: CRGB Data Registers Field Register Bits Description CDATA 0x94 7:0 Clear channel data low byte 0x95 15:8 Clear channel data high byte RDATA 0x96 7:0 Red channel data low byte 0x97 15:8 Red channel data high byte GDATA 0x98 7:0 Green channel data low byte 0x99 15:8 Green channel data high byte BDATA 0x9A 7:0 Blue channel data low byte 0x9B 15:8 Blue channel data high byte |
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