TMP112ASLASHBSLASHN datasheet(23/47 Pages) TI1

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7.4.4 Thermostat Mode (TM)

The thermostat mode bit indicates to the device whether to operate in comparator mode (TM = 0 ) or interrupt

mode (TM = 1).

7.4.4.1 Comparator Mode (TM = 0)

In Comparator mode (TM = 0), the Alert pin and status flag are activated when the temperature equals or

exceeds the value in the T(HIGH) register and remains active until the temperature falls below the value in the

T(LOW) register. For more information on the comparator mode, see the Section 7.5.4 section.

7.4.4.2 Interrupt Mode (TM = 1)

In Interrupt mode (TM = 1), the Alert pin is activated when the temperature exceeds T(HIGH) or goes below T(LOW)

registers. The Alert pin is cleared when the host controller reads the temperature register. For more information

on the interrupt mode, see the Section 7.5.4 section.

7.5 Programming

7.5.1 Pointer Register

Figure 7-8 shows the internal register structure of the TMP112 family. The 8-bit Pointer Register of the device is

used to address a given data register. The Pointer Register uses the two LSBs (see Table 7-13) to identify which

of the data registers must respond to a read or write command. The power-up reset value of P1/P0 is '00'. By

default, the TMP112 family reads the temperature on power-up.

I/O

Control

Interface

SCL

SDA

Temperature

Configuration

LOW

HIGH

Pointer

Figure 7-8. Internal Register Structure

Table 7-6 lists the pointer address of the registers available in the TMP112 family. Table 7-7 lists the bits of the

Pointer Register byte. During a write command, bytes P2 through P7 must always be 0.

TMP112A/B/N Datasheet(PDF) 23 Page - Texas Instruments