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XRT83VSH28IB Datasheet(PDF) 68 Page - Exar Corporation |
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XRT83VSH28IB Datasheet(HTML) 68 Page - Exar Corporation |
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68 / 74 page ![]() XRT83VSH28 PRELIMINARY 65 8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT REV. P1.0.0 D2 BYTEsel LCV Counter Byte Select This bit is used to select the MSB or LSB for Reading the contents of the LCV counter for a given channel. The channel is addressed by using bits D[3:0] in register 0x8Ch. By default, the LSB byte is selected. 0 = Low Byte 1 = High Byte R/W 0 D1 chUPDATE LCV Counter Update Per Channel This bit is used to latch the contents of the counter for a given channel into a holding register so that the value of the counter can be read. The channel is addressed by using bits D[3:0] in register 0x8Ch. 0 = Normal Operation 1 = Updates the Selected Channel R/W 0 D0 chRESET LCV Counter Reset Per Channel This bit is used to reset the LCV counter of a given channel to its default state 0000h. The channel is addressed by using bits D[3:0] in register 0x8Ch. This bit must be set to "1" for 1 µS. 0 = Normal Operation 1 = Resets the Selected Channel R/W 0 TABLE 40: MICROPROCESSOR REGISTER 0X8EH BIT DESCRIPTION GLOBAL REGISTER (0X8EH) BIT NAME FUNCTION Register Type Default Value (HW reset) D7 D6 D5 D4 D3 D2 D1 D0 LCVCNT7 LCVCNT6 LCVCNT5 LCVCNT4 LCVCNT3 LCVCNT2 LCVCNT1 LCVCNT0 Line Code Violation Byte Contents These bits contain the LCV counter contents of the Byte selected by bit D2 in register 0x8Dh for a given channel. The channel is addressed by using bits D[3:0] in register 0x8Ch. By default, the contents contain the LSB, however no channel is selected.. R/W 0 0 0 0 0 0 0 0 TABLE 39: MICROPROCESSOR REGISTER 0X8DH BIT DESCRIPTION GLOBAL REGISTER (0X8DH) BIT NAME FUNCTION Register Type Default Value (HW reset) |
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