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M68HC08 Datasheet(PDF) 44 Page - Freescale Semiconductor, Inc |
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M68HC08 Datasheet(HTML) 44 Page - Freescale Semiconductor, Inc |
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44 / 288 page ![]() Memory Map Data Sheet MC68HC908BD48 — Rev. 2.1 44 Memory Map Freescale Semiconductor $0032 USB Endpoint 0 Data Register 2 (UD0R2) Read: UE0RD27 UE0RD26 UE0RD25 UE0RD24 UE0RD23 UE0RD22 UE0RD21 UE0RD20 Write: UE0TD27 UE0TD26 UE0TD25 UE0TD24 UE0TD23 UE0TD22 UE0TD21 UE0TD20 Reset: Indeterminate after reset $0033 USB Endpoint 0 Data Register 3 (UD0R3) Read: UE0RD37 UE0RD36 UE0RD35 UE0RD34 UE0RD33 UE0RD32 UE0RD31 UE0RD30 Write: UE0TD37 UE0TD36 UE0TD35 UE0TD34 UE0TD33 UE0TD32 UE0TD31 UE0TD30 Reset: Indeterminate after reset $0034 USB Endpoint 0 Data Register 4 (UD0R4) Read: UE0RD47 UE0RD46 UE0RD45 UE0RD44 UE0RD43 UE0RD42 UE0RD41 UE0RD40 Write: UE0TD47 UE0TD46 UE0TD45 UE0TD44 UE0TD43 UE0TD42 UE0TD41 UE0TD40 Reset: Indeterminate after reset $0035 USB Endpoint 0 Data Register 5 (UD0R5) Read: UE0RD57 UE0RD56 UE0RD55 UE0RD54 UE0RD53 UE0RD52 UE0RD51 UE0RD50 Write: UE0TD57 UE0TD56 UE0TD55 UE0TD54 UE0TD53 UE0TD52 UE0TD51 UE0TD50 Reset: Indeterminate after reset $0036 USB Endpoint 0 Data Register 6 (UD0R6) Read: UE0RD67 UE0RD66 UE0RD65 UE0RD64 UE0RD63 UE0RD62 UE0RD61 UE0RD60 Write: UE0TD67 UE0TD66 UE0TD65 UE0TD64 UE0TD63 UE0TD62 UE0TD61 UE0TD60 Reset: Indeterminate after reset $0037 USB Endpoint 0 Data Register 7 (UD0R7) Read: UE0RD77 UE0RD76 UE0RD75 UE0RD74 UE0RD73 UE0RD72 UE0RD71 UE0RD70 Write: UE0TD77 UE0TD76 UE0TD75 UE0TD74 UE0TD73 UE0TD72 UE0TD71 UE0TD70 Reset: Indeterminate after reset $0038 USB Endpoint 1/2 Data Register 0 (UD1R0) Read: Write: UE1TD07 UE1TD06 UE1TD05 UE1TD04 UE1TD03 UE1TD02 UE1TD01 UE1TD00 Reset: Indeterminate after reset $0039 USB Endpoint 1/2 Data Register 1 (UD1R1) Read: Write: UE1TD17 UE1TD16 UE1TD15 UE1TD14 UE1TD13 UE1TD12 UE1TD11 UE1TD10 Reset: Indeterminate after reset $003A USB Endpoint 1/2 Data Register 2 (UD1R2) Read: Write: UE1TD27 UE1TD26 UE1TD25 UE1TD24 UE1TD23 UE1TD22 UE1TD21 UE1TD20 Reset: Indeterminate after reset $003B USB Endpoint 1/2 Data Register 3 (UD1R3) Read: Write: UE1TD37 UE1TD36 UE1TD35 UE1TD34 UE1TD33 UE1TD32 UE1TD31 UE1TD30 Reset: Indeterminate after reset Addr. Register Name Bit 7 654321 Bit 0 = Unimplemented R = Reserved Figure 2-2. Control, Status, and Data Registers (Sheet 6 of 12) |
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