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M68HC08 Datasheet(PDF) 45 Page - Freescale Semiconductor, Inc |
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M68HC08 Datasheet(HTML) 45 Page - Freescale Semiconductor, Inc |
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45 / 288 page  Memory Map MC68HC908BD48 — Rev. 2.1 Data Sheet Freescale Semiconductor Memory Map 45 $003C USB Endpoint 1/2 Data Register 4 (UD1R4) Read: Write: UE1TD47 UE1TD46 UE1TD45 UE1TD44 UE1TD43 UE1TD42 UE1TD41 UE1TD40 Reset: Indeterminate after reset $003D USB Endpoint 1/2 Data Register 5 (UD1R5) Read: Write: UE1TD57 UE1TD56 UE1TD55 UE1TD54 UE1TD53 UE1TD52 UE1TD51 UE1TD50 Reset: Indeterminate after reset $003E USB Endpoint 1/2 Data Register 6 (UD1R6) Read: Write: UE1TD67 UE1TD66 UE1TD65 UE1TD64 UE1TD63 UE1TD62 UE1TD61 UE1TD60 Reset: Indeterminate after reset $003F USB Endpoint 1/2 Data Register 7 (UD1R7) Read: Write: UE1TD77 UE1TD76 UE1TD75 UE1TD74 UE1TD73 UE1TD72 UE1TD71 UE1TD70 Reset: Indeterminate after reset $0040 Sync Processor Control and Status Register (SPCSR) Read: VSIE VEDGE VSIF COMP VINVO HINVO VPOL HPOL Write: 0 Reset: 00000000 $0041 Vertical Frequency High Register (VFHR) Read: VOF 0 0 VF12 VF11 VF10 VF9 VF8 Write: CPW1 CPW0 Reset: 00000000 $0042 Vertical Frequency Low Register (VFLR) Read: VF7 VF6 VF5 VF4 VF3 VF2 VF1 VF0 Write: Reset: 00000000 $0043 Hsync Frequency High Register (HFHR) Read: HFH7 HFH6 HFH5 HFH4 HFH3 HFH2 HFH1 HFH0 Write: Reset: 00000000 $0044 Hsync Frequency Low Register (HFLR) Read: HOVER 0 0 HFL4 HFL3 HFL2 HFL1 HFL0 Write: Reset: 00000000 $0045 Sync Processor I/O Control Register (SPIOCR) Read: VSYNCS HSYNCS COINV R SOGSEL CLAMPOE BPOR SOUT Write: Reset: 00000000 Addr. Register Name Bit 7 654321 Bit 0 = Unimplemented R = Reserved Figure 2-2. Control, Status, and Data Registers (Sheet 7 of 12) |
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