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ST72324BJ2 Datasheet(PDF) 12 Page - STMicroelectronics |
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ST72324BJ2 Datasheet(HTML) 12 Page - STMicroelectronics |
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12 / 188 page ![]() Pin description ST72324B 12/188 Legend / Abbreviations for Table 1: Type: I = input, O = output, S = supply Input level: A = Dedicated analog input In/Output level: C = CMOS 0.3VDD/0.7DD CT = CMOS 0.3VDD/0.7DD with input trigger Output level: HS = 20mA high sink (on N-buffer only) Port and control configuration: Input: float = floating, wpu = weak pull-up, int = interrupt(a), ana = analog ports Output: OD = open drain(b), PP = push-pull a. In the interrupt input column, “eiX” defines the associated external interrupt vector. If the weak pull-up column (wpu) is merged with the interrupt column (int), then the I/O configuration is pull-up interrupt input, else the configuration is floating interrupt input. b. In the open drain output column, ‘T’ defines a true open drain I/O (P-Buffer and protection diode to VDD are not implemented). See Section 9: I/O ports and Section 12.9: I/O port pin characteristics for more details. Table 1. Device pin description Pin No. Pin Name Level Port Main function (after reset) Alternate Function Input Output 6 1 30 1 PB4 (HS) I/O CT HS X ei3 X X Port B4 7 2 31 2 PD0/AIN0 I/O CT X X X X X Port D0 ADC Analog Input 0 8 3 32 3 PD1/AIN1 I/O CT X X X X X Port D1 ADC Analog Input 1 9 4 PD2/AIN2 I/O CT X X X X X Port D2 ADC Analog Input 2 10 5 PD3/AIN3 I/O CT X X X X X Port D3 ADC Analog Input 3 11 6 PD4/AIN4 I/O CT X X X X X Port D4 ADC Analog Input 4 12 7 PD5/AIN5 I/O CT X X X X X Port D5 ADC Analog Input 5 13 8 1 4 VAREF (1) S Analog Reference Voltage for ADC 14 9 2 5 VSSA (1) S Analog Ground Voltage 15 10 3 6 PF0/MCO/AIN8 I/O CT Xei1 X X X Port F0 Main clock out (fCPU) ADC Analog Input 8 16 11 4 7 PF1 (HS)/BEEP I/O CT HS X ei1 X X Port F1 Beep signal output 17 12 PF2 (HS) I/O CT HS X ei1 X X Port F2 18 13 5 8 PF4/OCMP1_A/ AIN10 I/O CT XX X X X Port F4 Timer A Output Compare 1 ADC Analog Input 10 19 14 6 9 PF6 (HS)/ICAP1_A I/O CT HS X X X X Port F6 Timer A Input Capture 1 20 15 7 10 PF7 (HS)/ EXTCLK_A I/O CT HS X X X X Port F7 Timer A External Clock Source |
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