AS8267 datasheet(105/136 Pages) AMSCO

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Data Sheet AS8267 / AS8268

Revision 1.0, 19-Jun-07

Page 105 of 136

Boot Loader (BOOTLOAD)

After power-up the boot loader checks if the program memory (32kB Flash) is blank or if there is a program

available.

In case there is no program stored (no program length stored at 7FFFh and 7FFEh) the boot loader generates

‘SJMP$’ (Hex code: 80FEh) instruction address 0000h.

This guarantees a well defined behaviour after power-on.

In case there is a program stored in the Flash memory the boot load block loads also security information from

the upmost page of the Flash memory.

After the boot load the MCU will start to work.

The loaded program will be executed.

Watchdog Timer (WDT)

A watchdog timer is provided on-chip to automatically initiate a system reset if a ‘hold-off’ signal is not detected

within a predefined timeout period, by the watchdog.

The watchdog timer consists of a programmable timer driven either by the Mclk (main oscillator output

frequency), or the MCU clock (microcontroller unit clock). The watchdog timer timeout period is dependent

upon the programming of the WDTCLK register. When the watchdog times out, a reset signal is generated

which is OR-ed with the main system reset. Thus a watchdog timer reset is identical to a power on reset.

If the watchdog timer function is required, the watchdog is enabled by setting the WDTE register LSB (Bit 0).

As soon as this bit is enabled, the program must periodically access the WDTCLK register (either read or write)

to prevent the watchdog timer from timeout and thus resetting the device.

Address

Reset Value

Description

WDTE

9180h

xxxx.xxx0b

Enables or disables the watchdog timer function

0: watchdog disabled

1: watchdog enabled

WDTCLK[1:0]

9181h

xxxx.xxx00b

A read or write access clears the watchdog timer. Writing

bits [1:0] selects the clock source.

x ........Don’t care

Watchdog Timer Enable Register (WDTE)

MSB

LSB

WDTE0

Bit

Symbol Function

Not used

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