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MPC8280 Datasheet(PDF) 570 Page - Freescale Semiconductor, Inc

Part # MPC8280
Description  PowerQUICC??II Family Reference Manual
PDF  1386 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 570 Page - Freescale Semiconductor, Inc

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Communications Processor Module Overview
MPC8280 PowerQUICC II Family Reference Manual, Rev. 1
14-20
Freescale Semiconductor
The data RAM is designed to serve multiple requests—as long as the requests are not in the same bank—at
the same cycle.
Only the parameters in the parameter RAM require fixed addresses. The BDs, buffer data, and scratched
RAM can be located in the internal system RAM or in any unused parameter RAM, such as the area made
available when a serial channel or sub-block is not being used.
Microcode can be executed from the 32-Kbyte instruction RAM.
Figure 14-9 shows a memory map of the internal instruction RAM. Note that the addresses refer to CPU
address space.
Figure 14-9. Instruction RAM Partitioning
0X20000
CPM Instruction
0X21000
CPM Instruction
0X21800
CPM Instruction
0X22000
CPM Instruction
0X22800
CPM Instruction
0X23000
CPM Instruction
0X23800
CPM Instruction
0X28000
CPM Instruction /
0X24000
CPM Instruction
0X24800
CPM Instruction/
0X25000
2K
2K
2K
2K
2K
2K
2K
2K
2K
2K
CPM Instruction
2K
CPM Instruction
2K
0X20800
Reserved
Bank #1
Bank #2
Bank #3
Bank #4
Bank #5
Bank #6
Bank #7
Bank #8
Bank #10
Bank #9
Bank #15
Bank #16
0X27000
0X27800
CPM Instruction
2K
Bank #11
0X25800
CPM Instruction
2K
Bank #12
0X26000
CPM Instruction/
Bank #13
0X26800
CPM Instruction/
2K
Bank #14
0X2C000
Reserved
Trace Buffer
Trace Buffer
2K
Trace Buffer
Trace Buffer



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