MPC8280 datasheet(567/1386 Pages) FREESCALE

567 / 1386 page

Communications Processor Module Overview

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

14-17

14.4.2

Command Register Example

To perform a complete reset of the CP, the value 0x8001_0000 should be written to the CPCR. Following

this command, the CPCR returns the value 0x0000_0000 after two clocks.

14.4.3

Command Execution Latency

The worst-case command execution latency is 200 clocks and the typical command execution latency is

about 40 clocks.

14.5

Dual-Port RAM

The CPM has 64 Kbytes of static RAM. This RAM is divided into two 32-Kbyte blocks of RAM.

•

32 Kbytes of CPM-RISC data RAM. This RAM is used to store CPM-RISC parameter RAM and

data structures

•

32 Kbytes CPM-RISC instructions RAM. This RAM is used to store a microcode package of up to

8 K instructions.

Figure 14-7 shows a block diagram of the internal RAM modules.

RANDOM NUMBER

Generate a random number and put it in dual-port RAM; see RAND in Table 14-10.

IMA VERSION

CHANGE2

IMA version change. This command allows users to change the IMA version (1.0 or 1.1) for one IMA

group on the fly without software intervention.

1 Not available on the MPC8270.

2 MPC8280 only.

Table 14-8. Command Descriptions (continued)

Command

Description

MPC8280 Datasheet(PDF) 567 Page - Freescale Semiconductor, Inc