| Electronic Components Datasheet Search |
|
MPC8280 Datasheet(PDF) 575 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
MPC8280 Datasheet(HTML) 575 Page - Freescale Semiconductor, Inc |
|
575 / 1386 page ![]() Communications Processor Module Overview MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 Freescale Semiconductor 14-25 14.6.2 RISC Timer Command Register (TM_CMD) Figure 14-11 shows the RISC timer command register (TM_CMD). TM_CMD fields are described in Table 14-12. 14.6.3 RISC Timer Table Entries The 16 timers are located in the block of memory following the TM_BASE location; each timer occupies 4 bytes. The first half-word forms the initial value of the timer written during the execution of the SET TIMER command and the next half-word is the current value of the timer that is decremented until it reaches zero. These locations should not be modified by the user. They are documented only as a debugging aid for user code. Use the SET TIMER command to initialize table values. 14.6.4 RISC Timer Event Register (RTER)/Mask Register (RTMR) The RTER is used to report events recognized by the 16 timers and to generate interrupts. RTER can be read at any time. Bits are cleared by writing ones; writing zeros does not affect bit values. The RISC timer mask register (RTMR) is used to enable interrupts that can be generated in the RTER. Setting an RTMR bit enables the corresponding interrupt in the RTER; clearing a bit masks the corresponding interrupt. An interrupt is generated only if the RISC timer table bit is set in the SIU interrupt mask register; see Section 4.3.1.5, “SIU Interrupt Mask Registers (SIMR_H and SIMR_L).” 01 2 11 12 15 Field VR — TN 16 31 Field TIMER PERIOD (TP) Figure 14-11. RISC Timer Command Register (TM_CMD) Table 14-12. TM_CMD Field Descriptions Bits Name Description 0 V Valid. This bit should be set to enable the timer and cleared to disable it. 1 R Restart. Should be set for an automatic restart or cleared for a one-shot operation of the timer. 2–11 — Reserved. These bits should be written with zeros. 12–15 TN Timer number. A value from 0–15 signifying which timer to use—an offset into the timer table entries. 16–31 TP Timer period. The 16-bit timeout value of the timer is zero-based. The minimum value is 1 and is programmed by writing 0x0000 to the timer period.The maximum value of the timer is 65,536 and is programmed by writing 0xFFFF. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |