MPC8280 datasheet(578/1386 Pages) FREESCALE

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Communications Processor Module Overview

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

14-28

Freescale Semiconductor

If a SET TIMER command is issued, the CP makes the appropriate modifications to the timer table and

parameter RAM, but does not scan the timer table until the next tick of the internal timer. It is important

to use the SET TIMER command to properly synchronize timer table modifications to the execution of the

CP.

14.6.10 Using the RISC Timers to Track CP Loading

The RISC timers can be used to track CP loading. The following sequence provides a way to use the 16

RISC timers to determine if the CP ever exceeds the 96% utilization level during any tick interval.

Removing the timers adds a 4% margin to the CP utilization level, but the aggressive user can use this

technique to push CP performance to its limit. The user should use the standard initialization sequence and

incorporate the following differences:

1. Program the tick of the RISC timers to be every 1,024 x 16 = 16,384 system clocks.

2. Disable RISC timer interrupts, if preferred.

3. Using the SET TIMER command, initialize all 16 RISC timers to have a timer period of 0xFFFF,

which equates to 65,536.

4. Program one of the four general-purpose timers to increment once every tick. The general-purpose

timer should be free-running and should have a timeout of 65,536.

5. After a few hours of operation, compare the general-purpose timer to the current count of RISC

timer 15. If it is more than two ticks different from the general-purpose timer, the CP has, during

some tick interval, exceeded the 96% utilization level.

NOTE

General-purpose timers are up counters, but RISC timers are down counters.

The user should take this under consideration when comparing timer counts.

MPC8280 Datasheet(PDF) 578 Page - Freescale Semiconductor, Inc