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MPC8280 Datasheet(PDF) 616 Page - Freescale Semiconductor, Inc |
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MPC8280 Datasheet(HTML) 616 Page - Freescale Semiconductor, Inc |
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616 / 1386 page ![]() CPM Multiplexing MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 16-4 Freescale Semiconductor Figure 16-2. Enabling Connections to the TSA 16.3 NMSI Configuration The CMX supports an NMSI mode for each of the FCCs, SCCs, and SMCs. Each serial device is connected independently either to the NMSI or to the TSA using the clock route registers. The user should note, however, that NMSI pins are multiplexed with other functions at the parallel I/O lines. Therefore, if a combination of TDM and NMSI channels are used, consult the MPC8280’s pinout to determine which FCC, SCC, and SMC to connect and where to connect them. The clocks provided to the FCCs, SCCs, and SMCs are derived from a bank of 8 internal BRGs and 20 external CLK pins; see Figure 16-3. There are two main advantages to the bank-of-clocks approach. First, a serial device is not forced to choose a serial device clock from a predefined pin or BRG; this allows a flexible pinout-mapping strategy. Second, a group of serial receivers and transmitters that needs the same clock rate can share the same pin. This configuration leaves additional pins for other functions and minimizes potential skew between multiple clock sources. En En En En SI RAMs Time-Slot Assigners TDM a,b,c,d Enable = 1 TDM a Pins TDM b Pins TDM c Pins TDM d Pins FCC1 FCC2 FCC3 SCC1 SCC2 SCC3 SCC4 SMC1 SMC2 MII1/UTOPIA 8/16/M-phy FC1 = 0 MII2/UTOPIA 8/M-phy FC2 = 00 MII3 FC3 = 0 SCC1 Pins SC1 = 0 SCC2 Pins SC2 = 0 SCC3 Pins SC3 = 0 SCC4 Pins SC4 = 0 SMC1 Pins SMC1 = 0 SMC2 Pins SMC2 = 0 MCCs TDM a channels TDM b channels TDM c channels TDM d channels |
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