MPC8280 datasheet(861/1386 Pages) FREESCALE

861 / 1386 page

Serial Management Controllers (SMCs)

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

28-7

To extract data from a partially full receive buffer, issue a CLOSE RXBD command.

Certain parameter RAM values must be initialized before the SMC is enabled. Other values are initialized

or written by the CP. Once values are initialized, software typically does not need to update them because

activity centers mostly around transmit and receive BDs rather than parameter RAM. However, note the

following:

•

Parameter RAM can be read at any time.

•

Values that pertain to the SMC transmitter can be written only if SMCMR[TEN] is zero or between

the STOP TRANSMIT and RESTART TRANSMIT commands.

•

Values for the SMC receiver can be written only when SMCMR[REN] is zero, or, if the receiver

is previously enabled, after an ENTER HUNT MODE command is issued but before the CLOSE RXBD

command is issued and REN is set.

0x28

MAX_IDL

Hword

Maximum idle characters. (UART protocol-specific parameter) When a character is

received on the line, the SMC starts counting idle characters received. If MAX_IDL idle

characters arrive before the next character, an idle time-out occurs and the buffer

closes, which sends an interrupt request to the core to receive data from the buffer.

MAX_IDL demarcates frames in UART mode. Clearing MAX_IDL disables the function

so the buffer never closes, regardless of how many idle characters are received. An idle

character is calculated as follows: 1 + data length (5 to 14) + 1 (if parity bit is used) +

number of stop bits (1 or 2). For example, for 8 data bits, no parity, and 1 stop bit,

character length is 10 bits.

0x2A

IDLC

Hword

Temporary idle counter. (UART protocol-specific parameter) Down-counter in which the

CP stores the current idle counter value in the MAX_IDL time-out process.

0x2C

BRKLN

Hword

Last received break length. (UART protocol-specific parameter) Holds the length of the

last received break character sequence measured in character units. For example, if

the receive signal is low for 20 bit times and the defined character length is 10 bits,

BRKLN = 0x002, indicating that the break sequence is at least 2 characters long.

BRKLN is accurate to within one character length.

0x2E

BRKEC

Hword

Receive break condition counter. (UART protocol-specific parameter) Counts break

conditions on the line. A break condition may last for hundreds of bit times, yet BRKEC

increments only once during that period.

0x30

BRKCR

Hword

Break count register (transmit). (UART protocol-specific parameter) Determines the

number of break characters the UART controller sends. Set when the SMC sends a

break character sequence after a STOP TRANSMIT command. For 8 data bits, no parity,

1 stop bit, and 1 start bit, each break character is 10 zeros.

0x32

R_MASK

Hword

Temporary bit mask. (UART protocol-specific parameter)

0x34

—

Word

SDMA Temp

1 From the pointer value programmed in SMCx_BASE: SMC1_BASE at 0x87FC, SMC2_BASE at IMMR + 0x88FC.

2 Not accessed for normal operation. May hold helpful information for experienced users and for debugging.

Table 28-2. SMC UART and Transparent Parameter RAM Memory Map (continued)

Offset 1

Name

Width

Description

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