MPC8280 datasheet(873/1386 Pages) FREESCALE

873 / 1386 page

Serial Management Controllers (SMCs)

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

28-19

Figure 28-10 shows an example of the timing of various events in the SMCE.

Figure 28-10. SMC UART Interrupts Example

28.3.12 SMC UART Controller Programming Example

The following initialization sequence assumes 9,600 baud, 8 data bits, no parity, and 1 stop bit in a 66-MHz

system. BRG1 and SMC1 are used. (The SMC transparent programming example uses an external clock

configuration; see Section 28.4.11, “SMC Transparent NMSI Programming Example.”)

1. Configure the port D pins to enable SMTXD1 and SMRXD1. Set PPARD[8,9] and PDIRD[9].

Clear PDIRD[8] and PSORD[8,9].

2. Configure the BRG1. Write BRGC1 with 0x0001_035A. The DIV16 bit is not used and the divider

is 429 (decimal). The resulting BRG1 clock is 16

× the preferred bit rate.

3. Connect BRG1 to SMC1 using the CPM mux by clearing CMXSMR[SMC1, SMC1CS].

4. In address 0x87FC, assign a pointer to the SMC1 parameter RAM.

5. Assuming one RxBD at the beginning of dual-port RAM followed by one TxBD, write RBASE

with 0x0000 and TBASE with 0x0008.

6. Write 0x1D01_0000 to CPCR to execute the INIT RX AND TX PARAMETERS command.

7. Write RFCR and TFCR with 0x10 for normal operation.

8. Write MRBLR with the maximum number of bytes per receive buffer. Assume 16 bytes, so

MRBLR = 0x0010.

9. Write MAX_IDL with 0x0000 in the SMC UART-specific parameter RAM to disable the

MAX_IDL functionality for this example.

10. Clear BRKLN and BRKEC in the SMC UART-specific parameter RAM.

11. Set BRKCR to 0x0001; if a STOP TRANSMIT COMMAND is issued, one break character is sent.

BRK

BRKE

Break

Line Idle

10 Characters

RXD

Characters

Received by SMC UART

Time

Line Idle

TXD

Characters

Transmitted by SMC UART

Line Idle

7 Characters

NOTES:

SMC UART SMCE

Events

1. The first RX event assumes receive buffers are 6 bytes each.

2. The second RX event position is programmable based on the MAX_IDL value.

3. The BRK event occurs after the first break character is received.

SMC UART SMCE

Events

NOTES:

The TX event assumes all seven characters were put into a single buffer, and the TX event occurred when the seventh

character was written to the SMC transmit FIFO.

MPC8280 Datasheet(PDF) 873 Page - Freescale Semiconductor, Inc

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