MPC8280 datasheet(869/1386 Pages) FREESCALE

869 / 1386 page

Serial Management Controllers (SMCs)

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

28-15

Data length represents the number of octets the CP writes into the buffer. After data is received in buffer,

the CP only writes them once as the BD closes. Note that

the memory allocated for this buffer should be

no smaller than MRBLR. The Rx data buffer pointer points to the first location of the buffer and must be

even. The buffer can be in internal or external memory. Figure 28-7 shows the UART RxBD process,

showing RxBDs after they receive 10 characters, an idle period, and five characters (one with a framing

error). The example assumes that MRBLR = 8.

8–9

—

Reserved, should be cleared.

Buffer closed on reception of break. Set when the buffer closes because a break sequence was

received. The CP writes BR after the received data is in the buffer.

Framing error. Set when a character with a framing error is received and located in the last byte of

this buffer. A framing error is a character with no stop bit. A new receive buffer is used to receive

additional data. The CP writes FR after the received data is in the buffer.

Parity error. Set when a character with a parity error is received in the last byte of the buffer. A new

buffer is used for additional data. The CP writes PR after received data is in the buffer.

—

Reserved, should be cleared.

Overrun. Set when a receiver overrun occurs during reception. The CP writes OV after the received

data is in the buffer.

—

Reserved, should be cleared.

Table 28-7. SMC UART RxBD Field Descriptions (continued)

Bit

Name

Description

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