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MPC8280 Datasheet(PDF) 878 Page - Freescale Semiconductor, Inc

Part # MPC8280
Description  PowerQUICC??II Family Reference Manual
PDF  1386 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 878 Page - Freescale Semiconductor, Inc

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Serial Management Controllers (SMCs)
MPC8280 PowerQUICC II Family Reference Manual, Rev. 1
28-24
Freescale Semiconductor
Figure 28-12. Synchronization with the TSA
Once SMCMR[REN] is set, the first time-slot after the frame sync causes the SMC receiver to achieve
synchronization. Data is received immediately, but only during defined receive time slots. The receiver
continues receiving data during its defined time slots until REN is cleared. If an ENTER HUNT MODE
command is issued, the receiver loses synchronization, closes the buffer, and resynchronizes to the first
time slot after the frame sync.
Once SMCMR[TEN] is set, the SMC waits for the transmit FIFO to be loaded before trying to achieve
synchronization. When the transmit FIFO is loaded, synchronization and transmission begins depending
on the following:
•
If a buffer is made ready when the SMC2 is enabled, the first byte is placed in time slot 1 if CLSN
is 8 and to slot 2 if CLSN is 16.
•
If a buffer has its SMC enabled, then the first byte in the next buffer can appear in any time slot
associated with this channel.
•
If a buffer is ended with the L bit set, then the next buffer can appear in any time slot associated
with this channel.
If the SMC runs out of transmit buffers and a new buffer is provided later, idles are sent in the gap between
buffers. Data transmission from the later buffer begins at the start of an SMC time slot, but not necessarily
the first time slot after the frame sync. So, to maintain a certain bit alignment beginning with the first time
slot, make sure that at least one TxBD is always ready and that underruns do not occur. Otherwise, the
SMC transmitter should be disabled and reenabled. Section 28.2.4, “Disabling SMCs On-the-Fly,”
TDM Tx CLK
TDM Tx SYNC
TDM Tx
After TEN
If SMC runs out of Tx buffers and new ones
are provided later, transmission begins at
is set,
transmission
begins here.
the beginning of either time slot.
SMC1
SMC1
TDM Rx CLK
TDM Rx SYNC
TDM Rx
After REN is set or after
enter hunt mode command,
reception begins here.
SMC1
SMC1



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